Previously I used video chips like the 6847, but now I am looking for something that can generate VGA signals too. According to the wiki page the 6847 can do that since it can adjust the timing.
I was looking for some example schematic on google, but I couldn't find any.

Never mind, the mc6845 datasheet has a block diagram.

I don't have any experience with the 6847, but I did use the 6545 in an old text board I made over 25 years ago. I still have the schematics... What are your plans with it?
When I got back into electronics about 6 years ago, the 6845 was one of the first IC's I began looking at again.

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

Hello,
here http://65xx.unet.bz an example of working 6545 video board with VGA timing.
The dot clock is 25.175MHz and need to use an R6545EAP (the extended version, "E", can run vith clock = 3.5MHz max.).
As alternative can be used an HD6445 too.
The video generated is "text-only", in a matrix 80x25, with standard VGA font (8x16).
Text can have these attributes: inversion, blinking, underline and a palette of 5 bits for 32 mixed foreground/undergound colors (16 colors).
The output is digital and need to be converted in analog level with the converter (in the same link above).

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http://65xx.unet.bz/ - Hardware & Software 65XX family

I already did a CRTC board with the MC6847 + chroma gen, but I don't find it satisfying.
It requires dual port ram if you don't want artifacts popping when accessing video ram which complicates things. On the other hand I would like something that generates VGA because my little telly is tiny and black and white.
I figured I could do something compact vga, but the 6545 requires a lot of extra hardware which requires a big board.
Now I am trying to fit a 800x600, 8 color design on two xilinx 95xx series cpld-s. Maybe it is just doable.

On my video board the dual port ram is not mandatory: i used because i have some chips and because is less complicated the access. With standard ram need to stop cpu during read cycle too, and need an external latch to store the readden byte, and the schematic is more complex.
Looking at my schematic, all blocks now fitted in spare logics and gal's, can be fitted in xilinix cpld. The 6545 too can be fitted in a cpld (with fixed counter's). Anyway need always to grant unimpeded access to video ram buffer from both cpu and crtc. Less complex system can be possible if one can use for cpu the same clock of crtc (or a n times clock).

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http://65xx.unet.bz/ - Hardware & Software 65XX family

I wrote the VHDL code, and it barely fits in two cpld, xc95108 pc84 + xc9572 pc44, and three 64k 15 ns sram ic. I tried to rout it on a 5x10 cm board, but it just can't fit. Now I switched to a 7x10cm board and it fits. I still need to do some tweaking and checking before I can order the board, if I even have the money to order it (USD index skyrocketed).
As for accessing the video ram, I made it so that each 8 pixels displayed there is a write cycle. Since the pixel clock is 40MHz that means that write cycles can occur at the rate of 5MHz which means there won't even be a need for wait cycles when writing.