Today I came across a description of the Apple III's memory system, and found that in addition to a fairly conventional banking system to expand memory beyond 64k, it also offers
- relocatable page zero and stack (both relocations are coupled)
- (zp),y accesses can fetch a third pointer byte from a specific page to offer 24-bit addressing (only 20 bits implemented)

The extra byte of pointer fetch doesn't cost an extra cycle, because the RAM is organised to fetch related pairs of bytes already, for purposes of video output.

Although the address mangling must cost some time in each access, the 1981-era system is only running at 2MHz so no extra cycles are needed.

More detail can be found at
http://apple3.org/Documents/Magazines/A ... ssing.html
and
https://archive.org/stream/apple3_Info_ ... 0/mode/2up
https://archive.org/stream/BankSwitchRa ... 1/mode/2up

(as seen in our mos6502 post this week archived here. And the slightly upstream article here.)

(Acorn did something similar in their in-house Turbo second processor, but took an extra cycle for the fetch of the third pointer byte:
viewtopic.php?f=4&t=1465
)

Edit: link rot!

(I wondered if I should mention Dr Jefyll's ingenious KimKlone 6502 extension, but it looks like it uses bank byte registers throughout, with no simple 3-byte pointer support. I'm ready to be corrected on that.)

Thanks for the mention, Ed.

Yes and no. To use a 24-bit address you need an extra instruction to load one of the bank registers beforehand. But that's pretty easy to tolerate, given that KK can load a bank register in as little as 2 cycles -- just as fast as a load to A, X or Y. The available address modes are Immediate, Absolute, Zero-page and Zero-page,X. (see the KK Instruction list)

In the following example K2 is loaded using immediate mode. IOW the high-address byte going into the bank register is stored as part of the LDK2 instruction. This is a good choice when the subsequent instruction(s) will use Absolute mode -- where, again, the address bytes are stored as part of the instruction.


cheers,
Jeff

[Add code example. Other edits.]

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html