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PostPosted: Sun Jul 13, 2014 10:13 pm 
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Guys --

I took Daryl's sample code and dropped it into the ROM so that I could prove that video output worked. I didn't do the kind of stability testing that would have revealed a timing condition such as this. I would bet that it's the software that waits for the chip to be ready as Daryl points out. The previous hardware design had an additional chip or two. If we discover that the flip-flop is again needed, I think there's room on the board for it.

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PostPosted: Sun Jul 13, 2014 10:51 pm 
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@Jeff, thanks for the explanation, that makes sense.

@Rich, no worries things went too smoothly so far, so some hitch had to surface. I don't have a logic probe or oscilloscope, but I might be able to program a microcontroller to act like a bus monitor and tell me what the CPU is up too.

I was able to get your ROM compiling under the Java As65 with a few minor tweaks to the op codes and making sure the label cases matched the references. I was also able to get TASS working on 64 bit Windows 7 via DOSBox 0.74. So I can build new ROM's and try and debug this, but I'm out of time today.


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PostPosted: Sun Jul 13, 2014 11:33 pm 
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Great news Martin on getting a compiler working. I sometimes use Microsoft Virtual PC or DOS-Box for stuff like that. There is also a native 64-bit version of TASS (the Table Assembler) that I use quite a bit, too.

Keep us posted on what you find out. If there's an easy software fix, I'll make it a permanent part of the BIOS.

Thanks!

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PostPosted: Mon Jul 14, 2014 12:13 am 
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Martin_H wrote:
I don't have a logic probe or oscilloscope, but I might be able to program a microcontroller to act like a bus monitor and tell me what the CPU is up too.
Good idea -- the microcontroller is a useful tool. But it would take a lot of connections to monitor all the bus lines, so it would be time consuming to set up a bus monitor.

An easier test that's almost as good is to merely halt the CPU and then read the address bus using a multimeter or even an LED. That would reveal just a single address, but it'd probably be enough to tell you where the program is getting stuck.

The microcontroller could either pull RDY low, or, if it were set up to generate the 6502 clock, it could merely cease generating clock pulses at the appropriate time. Ideally you would only halt when SYNC is true, although that could be accomplished just by running repeated tests until you get lucky.

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PostPosted: Mon Jul 14, 2014 12:44 am 
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If you want to single-step the 6502, look in the original KIM manuals -- it has a simple circuit you can use to do that and it can be grafted onto the SBC with not a lot of trouble. I actually toyed with adding an "SST" connector but I never got around to it.

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PostPosted: Mon Jul 14, 2014 3:47 am 
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Dr Jefyll wrote:
Martin_H wrote:
I don't like this code because what happens if VOutput is called with an accumulator value which doesn't have bit7 set
Martin, the BIT instruction is tricky because the flags are affected in two different ways. The Z flag is updated according to the result of ANDing the accumulator with memory. But the N and V flags get updated directly from memory bit 7 and bit 6, respectively -- they do not reflect the result of the AND operation. So, the accumulator value has no bearing on the result in N and V.

This makes BIT instruction useful and versatile... but also slightly misleading! :o

-- Jeff

Plus, with the 65C02 and 65C816 you can do something like:

Code:
          lda some_register
          bpl did_not_interrupt
;
          bit #some_mask
          beq not_an_irq_source

This gives you the ability to load a register and make multiple non-destructive tests on the value read from it. Also, BIT <zp>,X and BIT <addr>,X are possible.

Indeed, as Jeff notes, BIT is very useful and versatile.

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PostPosted: Tue Jul 15, 2014 1:35 am 
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I believe I've confirmed that the problem is in the VOutput routine in video.asm. Here's my methodology:

* Test 1 - I removed all traces of video.asm from the ROM and the computer worked flawlessly for six restarts.

* Test 2 - I added back video.asm, but didn't call the initialization function, and again it performed flawlessly.

* Test 3 - I added back the call to VInitDisp and again the ROM performed perfectly.

At this point there's only one difference between the ROM that fails and the one that works:
Code:
C:\Users\Martin\6502\SBC2.7>diff ACIA1.asm ..
92c92
<               jsr   VOutput           ; send output to video also
---
> ;             jsr   VOutput           ; send output to video also

So I would say that confirms the hunch that it's a problem with the ATMega88 ability to process characters and the synchronization code in the VOutput routine. I'm not sure what to do about it yet, but at least I have a solid ROM and understand the problem. In reading VOutput the problem could be either in the wait to be available, or the wait for the ACK. My guess is it's the wait for ACK which is missed because of the lack of a flip flop. Which raised a question why wait for an ACK?

Note that I had one lockup that I attributed to PuTTY weirdness and not the computer ROM. Sometimes PuTTY gets confused when you tab between windows and isn't able to process keystrokes afterwards. The lockups I experienced occurred while you were typing in the terminal window.


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PostPosted: Thu Jul 17, 2014 1:29 am 
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Does anyone have a pointer to the firmware for Daryl's single-chip ATMEGA88 video controller? I want to read through it to understand how the synchronization is supposed to happen.


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PostPosted: Thu Jul 17, 2014 1:35 am 
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I have it but I believe it's on the video controller page on his site.

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PostPosted: Thu Jul 17, 2014 10:10 am 
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RichCini wrote:
I have it but I believe it's on the video controller page on his site.


I poked around on Daryl's site before asking and could only find this one:

http://sbc.rictor.org/vid3.html

From the schematic and code sample it looks like it uses a parallel interface while yours uses a shift register. Do they use the same firmware?


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PostPosted: Thu Jul 17, 2014 4:35 pm 
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Hi Martin,

I have to confess that I had a huge memory lapse. My first look at the schematic you posted last week was evidently too quick. I did not notice it was using the serial interface and just assumed it was the parallel one. I feel even dumber because I provided the video circuit to Rich which included the serial interface but somehow forgot that point!! Sorry Rich, been so busy - didn't mean to leave you hanging out there!

I have not posted the ATMega88 firmware that uses the SPI port for input. I actually wrote that code originally for my graphical video display but never really worked that to completion.

I collaborated with Rich to get the ATMega88 working with the 65C22 SR. After initially testing the code I developed, I discovered the handshaking was an issue. I added a timer to the AVR firmware to ensure the AVR kept the busy flag high long enough for the SBC to see it. At that time it appeared to have fixed the problem.

I have not looked over the code Rich published. I am attaching a copy of the latest code I had worked on.

Let me know if you have any questions. If I don't respond, send me PM.

thanks!

Daryl




I have attached that code I sent Rich.


Attachments:
File comment: Zip file with schematic, AVR Firmware, and 6502 demo asm file.
Vid2c.zip [259.97 KiB]
Downloaded 66 times

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PostPosted: Thu Jul 17, 2014 7:16 pm 
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The code I'm using is Daryl's code :) I didn't make any modifications to either the chip firmware (other than selecting the Apple font) or the driver code that I grafted into the system ROM. So, if the version that Daryl just posted is different, then I need to merge that in. I guess I should WinDiff it and see.

PS...just WinDiff'ed the code. The firmware looks fine other than the addition of the alternate font in the new version. The differences are in vid2c.asm. The initialization of the 6522 is different, but I really haven't done a deep dive to understand the change. The schematics are fine.


Thanks guys!

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PostPosted: Thu Jul 17, 2014 10:46 pm 
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Thanks Daryl and Rich, this is making more sense now. Rich has confirmed he's using the same firmware with the exception of an additional font. Since the font shouldn't alter timing, let's assume it is not the issue. In looking at Rich's VOutput routine and the one in Daryl's ZIP they're in same ballpark now, with one small difference.

Here's Rich's SBC 2.7 OS:
Code:
VOutput
                bit  Via2PRB      ;  read handshake byte (pb7)
                bmi  VOutput      ;  if pb7=1, wait for AVR to be ready
                sta  Via2SR      ; send to display via shift register
VOutput1
                bit  Via2PRB      ; read handshake byte
                bpl  VOutput1      ; if pb7=0, wait for AVR to ack
                rts

This is in Daryl's firmware ZIP archive:
Code:
VOutput
   bit  vportb      ; 4 read handshake byte
   bmi  Voutput      ; 2/3 if 0, wait for AVR to be ready
   sta  vsr      ; send to display via serial port
VOutput1
   bit  vportb      ; 4 read handshake byte
   bpl  Voutput1      ; 2/3 if 0, wait for AVR to be ready

fast   LDY  #$80
   LDA  #$00
VLOOP   DEC
   BNE  VLOOP
   DEY
   BNE   VLOOP

   rts


They're identical except for what looks like a substantial delay loop before the rts in Daryl's code. That loop could significantly slow the 6502's frequency of VOutput calls, but the SBC 2.7 OS is doing a whole bunch more than Daryl's sample. For now I'll assume the two VOutput routines are effectively identical.

Which makes me think the ATMEGA88 firmware is getting wedged and never altering the pin state. I was looking at the schematic and it claims that the ATMEGA88 is reset when the 6502 is, but I've noticed that often the only way to get the system unstuck is to power it off and power it back up again. I don't know if that is significant or not.


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PostPosted: Fri Jul 18, 2014 12:12 am 
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Martin --

Can you try your test with the delay that's in Daryl's output code?

Rich

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PostPosted: Fri Jul 18, 2014 12:39 am 
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RichCini wrote:
Martin --

Can you try your test with the delay that's in Daryl's output code?

Rich


I just did. It looks like 300 baud TTY and it still locks up.

I can also confirm that after it locks up power cycling it is the only way to get it to work again. The hard reset or panic buttons won't cut it.

I haven't completely eliminated the 6522 as a suspect, because it is between the ATMEGA88 and the 6502. But I would think it would fail more like a lightbulb than work and then lock up like this.


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