I started doing a little bit on the successor to my sandbox board described in this thread:
viewtopic.php?f=4&t=2453Biggest difference with previous version is that the CPU (either 6502 or 65816) will be connected directly to an SRAM chip, rather than connected to the FPGA only. The big advantage is that this frees up a lot of pins on the FPGA, which can then be used for other purposes. There's also a disadvantage: the FPGA now shares the memory bus with the CPU, so they will have to take turns. I've debated this issue for quite a while, but in the end I decided that having the extra pins was worth more than some small speed gain. And if speed is really important, it's always possible to use the 6502 soft core in the FPGA.
I've attached my schematics so far, and also a bit of the dense layout, just to try it out.
The SRAM is a Cypress CY7C1049DV33, 512kB, 10 ns device in SOJ packaging. The SOJ has wide enough pins that I can fit a 6 mil trace in between, which greatly simplifies routing the bus. The FPGA is a Spartan 6.
The rest of the schematic is still open. I'm planning on a ADV7391 video generator (can do component, S-video and composite), a sound chip, UART, dual USB host port, micro SD (maybe SD instead), and serial Flash (also used for FPGA)
When the design is finished, I will make extra boards for anybody who is interested. These will be available to forum members at cost of materials. If anybody is interested in certain features, let me know.