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 Post subject: 6809 circuit review
PostPosted: Fri Aug 09, 2013 11:44 am 
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Location: Southampton, UK
I've been working, for the last few months, on a 6809 "SBC". It's my first attempt at this kind of thing. For now the circuit is on breadboard.

The hardware:

* 6809, 2Mhz no motorola clone
* 3.8ish Mhz crystal
* AT28C256 32KB EEPROM (only 16KB is wired in)
* 512KB SRAM (only 32KB is wired in)
* Various glue logic (74HC)
* 6850 UART
* PCF8584 I2C bus driver
* Various I2C ICs, DSL1307 RTC etc

Essentially my problem is that the circuit works intermittently. It will sometimes struggle to start, with the UART generating random characters, until it's been reset a few times. Afterwards it is will perform perfectly for hours. I have put this down the perils of circuits on breadboard, but it would be awesome if some knowledgeable folks could take a look and confirm that the circuit design itself is good.

I hope to transfer it to 6-hole strip board at some point, but obviously it would be great to know the circuit is good first. :)

I've attached two pics to this post, one of the core computer and for the IO.

You can read more about this little project here: http://aslak3.blogspot.co.uk/

Any other questions about the circuit/software etc please ask!!

Lawrence


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6809computerio.png
6809computerio.png [ 89.79 KiB | Viewed 2739 times ]
6809computermain.png
6809computermain.png [ 89.7 KiB | Viewed 2739 times ]

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 Post subject: Re: 6809 circuit review
PostPosted: Fri Aug 09, 2013 2:27 pm 
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It's been a very long time since I looked at the 6809. Perhaps one of the other members with will also add some comments. Not having looked at the 6809 (or worked with its cousin the 6800) in several decades, my evaluation is based on experience with microcomputer/microprocessor systems in general.

With the caveats out of the way, I suspect some of your problem may stem from the breadboard. However, if your schematics are up to date and accurate, then there are number of logic errors that mean you don't have a working board with breadboard induced reliability issues.

First, virtually every where that a signal is active low, you have shown a bubble on the pin. However, you do not show the bubble on the nDMA/BREQ pin of the processor. This is an active low pin, and the way your schematic is wired, i.e. it is connected to ground, the processor is not going to execute any instructions and will instead grant the bus to an external bus master. You can check the bus state on the {BA, BS} pins. The data sheet indicates that a {1, 1} state on these pins indicates that the nDMA/BREQ pin is low and that the processor is halted until it is released, i.e. driven or pulled to logic 1.

The same comment applies to the nWE pin of your EPROM and RAM symbols. These are active low inputs, and for consistency you should show the bubble on the symbol.

Second, MRDY is a the memory ready signal. You show it connected to signal ground. In this state, the data sheet indicates that the processor will insert wait states. If you don't have logic to drive it, then connect it to logic 1.

Third, you have not connected the nRD input of your PCF8584 component to the nREAD signal that you generated on your processor sheet to output enable the ROM and RAM. This part operates in the same manner as those two components.

A similar comment regarding the bubbles on the nIACK, and nINT pins of the PCF8584 applies. I recommend terminating all unused pins like nIACK to guarantee behavior. As a nit, you have applied a > on the inside edge of your processor symbol for the E and Q clock outputs. If you want to apply a decorator to these pins it should be a square wave rather than the > symbol which generally signifies an edge sensitive input not a clock or strobe output. Also, from my perspective, the wide bar on the battery is generally taken to be the positive. Please check that the battery pins and polarity are correctly connected to the VBAT pin of your Dallas time keeper.

Finally, I would recommend connecting your unused 7400 gate to BA, BA and its output to an LED. When the LED is on, the processor is halted. This would be a relatively simple health/status monitor for your processor.

In summary, it appears that you have a few schematic errors, and those are sufficient to make your design stop executing instructions shortly after reset. In light of these errors, I would stay on the breadboard until the changes I identified above are made and you can demonstrate a short loop with a two channel scope. I use a sequence something like NOP NOP BRA $0 to test that the lower two bits of the address bus is incrementing in a consistent manner.

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 Post subject: Re: 6809 circuit review
PostPosted: Fri Aug 09, 2013 7:46 pm 
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Hi there MichaelM!

Thanks very much for looking!

MichaelM wrote:
With the caveats out of the way, I suspect some of your problem may stem from the breadboard. However, if your schematics are up to date and accurate, then there are number of logic errors that mean you don't have a working board with breadboard induced reliability issues.


The schematic is mostly up to date, though the symbols used are of variable quality. Some I found online, some I cobbled together. I use gEDA, which is pretty good though probably not as good as the big commercial software.

Quote:
First, virtually every where that a signal is active low, you have shown a bubble on the pin. However, you do not show the bubble on the nDMA/BREQ pin of the processor.


Yes, the usage of bubbles is a bit "variable", and sloppy. The bars are right though.

Quote:
This is an active low pin, and the way your schematic is wired, i.e. it is connected to ground, the processor is not going to execute any instructions and will instead grant the bus to an external bus master. You can check the bus state on the {BA, BS} pins. The data sheet indicates that a {1, 1} state on these pins indicates that the nDMA/BREQ pin is low and that the processor is halted until it is released, i.e. driven or pulled to logic 1.


If you look closely you'll see that nDMA/BREQ is tied high, to vcc. I was a tad sloppy and drew the "pull" upside down, just because that was the easiest way to place things. I'm quite new to this all, and will try to ensure that my "high"s go up and my "lows" go down in future...

A stupid question: what should you do with unused outputs? Is it ok to leave them dangling, or should they be tied low? Or high? I tend to leave them floating. Obviously unused inputs is a different matter, and something I seem to be sloppy on.

Quote:
Second, MRDY is a the memory ready signal. You show it connected to signal ground. In this state, the data sheet indicates that the processor will insert wait states. If you don't have logic to drive it, then connect it to logic 1.


My Vcc tie is upside down on this pin.

Quote:
Third, you have not connected the nRD input of your PCF8584 component to the nREAD signal that you generated on your processor sheet to output enable the ROM and RAM. This part operates in the same manner as those two components.


I wasn't sure what to do here. The datasheet hints that the nRD pin is used when the PCF8584 is used with a Z80, which (I understand) has separate read and write lines, vs the Motorola-style RnW pin. I will give the sheet another read and certainly give this a go.

Quote:
A similar comment regarding the bubbles on the nIACK, and nINT pins of the PCF8584 applies. I recommend terminating all unused pins like nIACK to guarantee behavior. As a nit, you have applied a > on the inside edge of your processor symbol for the E and Q clock outputs. If you want to apply a decorator to these pins it should be a square wave rather than the > symbol which generally signifies an edge sensitive input not a clock or strobe output. Also, from my perspective, the wide bar on the battery is generally taken to be the positive. Please check that the battery pins and polarity are correctly connected to the VBAT pin of your Dallas time keeper.


Regarding the symbols, you are right of course. It just came down to time for the most part, to get the pin numbers and names right.

Oops! The battery, in he circuit, is round the right way. I wasn't sure which way round the symbol should go in the schematic. It seems that long line = long LED lead, a useful mnemonic!

Quote:
Finally, I would recommend connecting your unused 7400 gate to BA, BA and its output to an LED. When the LED is on, the processor is halted. This would be a relatively simple health/status monitor for your processor.


Using LEDs on BA and BS sounds like a great idea.

Quote:
In summary, it appears that you have a few schematic errors, and those are sufficient to make your design stop executing instructions shortly after reset. In light of these errors, I would stay on the breadboard until the changes I identified above are made and you can demonstrate a short loop with a two channel scope. I use a sequence something like NOP NOP BRA $0 to test that the lower two bits of the address bus is incrementing in a consistent manner.


Thanks very much for the tips and help. I will certainly stay on breadboard until I get some decent reliability out of my design.

Lawrence

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 Post subject: Re: 6809 circuit review
PostPosted: Fri Aug 09, 2013 9:49 pm 
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Quote:
If you look closely you'll see that nDMA/BREQ is tied high, to vcc. I was a tad sloppy and drew the "pull" upside down, just because that was the easiest way to place things. I'm quite new to this all, and will try to ensure that my "high"s go up and my "lows" go down in future...

Sorry about that. Will have to get the astigmatism looked at again.

But with that comment, I went back over thee processor schematic again. I noticed one thing regarding the crystal circuit. The two caps are connected to just one side of the crystal. I would expect that you'd have one cap on one side and the other on the other side of the crystal.

If Garth or BDD dropped in to provide some input, they'd probably recommend a can oscillator. It's self-contained and buffered crystal oscillator is much more forgiving of the parasitics in a breadboard than a bare crystal. I remember my nightmare of getting a 1 MHz crystal to oscillate reliably in a frequency divider application from the 80s. Since then, I tend to use packaged oscillators, unless I'm just absolutely driven by other factors to use a crystal.

You don't have a loading problem on E, but I would consider wiring Q to the UART clocks instead of E.

I haven't checked whether the reset input of your 6809 has a Schmitt trigger input to sharpen the slow rise time of your RC-based reset circuit. If it doesn't have one, I would recommend changing your 7404 inverter to a 74HC14, or similar device. You'll need to cascade two of them but it appears that you have a few spares. (I was just reminded of an issue with crystals. The reset circuit period/time constant should be slow enough to let the oscillator settle out before the reset signal is released at the processor.) Oops. you don't seem to have a cap to ground on your reset circuit. You need something like a 10ms - 100ms time constant on that circuit. Just place a cap across your PB switch. I would change R1 to 10k or more, and add a cap in the range of 0.1uF to 1uF.

In general, when I'm bringing up a bare system like yours for the first time, I prefer to add PUs/PDs to unused inputs as appropriate. I generally leave unused totem pole outputs unconnected, but open-drain outputs I will sometimes attach to a PU if there may be some benefit to using them. Since you are on a breadboard, I would probably leave the unused outputs unconnected.

Hope this helps.

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 Post subject: Re: 6809 circuit review
PostPosted: Sat Aug 10, 2013 8:23 am 
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Nice work!

I agree on the reset circuit. Add a capacitor to ground. A clean reset is important.

Take a look at my 6303 design to see how I solved it with an RC net and a buffer.
http://www.waveguide.se/?article=mc3-a-diy-8-bit-computer

Daniel


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 Post subject: Re: 6809 circuit review
PostPosted: Sat Aug 17, 2013 1:11 pm 
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Posts: 65
If it helps, you may be interested in my simple 6809 design...
Runs Microsoft BASIC and has a 115200 baud interface. Please feel free to ask if you have any queries.

32K RAM and using just 6 chips (or 5 if you use a USB-TTL serial cable instead of RS232) - add one more chip to get hardware handshaking working.

Everything you need is on my web page...
http://searle.hostei.com/grant/6809/Simple6809.html

Image

Regards.

Grant
http://searle.hostei.com/grant/index.html


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 Post subject: Re: 6809 circuit review
PostPosted: Thu Sep 26, 2013 5:44 pm 
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I think the problem is in rest circuit because to reset the microcontroller we need a pulse of specific time width that will reset the circuit and if the timing of the pulse is smaller, then it would create problem while resetting. You can calculate this time period from the frequency of the controller or you should find it in the datasheet of the IC. Once you find the time period of the pulse just add the capacitor to increase the time period of the pulse and then it would work.

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 Post subject: Re: 6809 circuit review
PostPosted: Thu Sep 26, 2013 10:26 pm 
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oliver87 wrote:
I think the problem is in rest circuit because to reset the microcontroller we need a pulse of specific time width that will reset the circuit and if the timing of the pulse is smaller, then it would create problem while resetting. You can calculate this time period from the frequency of the controller or you should find it in the datasheet of the IC. Once you find the time period of the pulse just add the capacitor to increase the time period of the pulse and then it would work.

The problem with a button push for reset is never that it's too short, but rather that you probably won't get a clean-enough rising edge. Debouncing is always in order. If the input it goes to is a Schmitt-trigger type, ie, has hysteresis, a capacitor followed by that hysteresis will take care of the bouncing problem. I cover reset circuits in the reset page of the 6502 primer.

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 Post subject: Re: 6809 circuit review
PostPosted: Tue Oct 08, 2013 8:21 pm 
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If anyone is interested, I have updated my blog:

http://aslak3.blogspot.co.uk/

I have added a working IDE/CF interface, SPI via a 6522 and a PCB for the core computer parts. While the simple reset circuit will no doubt give me trouble eventually, it seems fine so far on the breadboard, and hasn't yet failed to reset on power on. Next up is filesystem (I choose Minix for various reasons) decoding, which is so far progressing well.

Grant, I did actually use your circuit for inspiration, including the (kind of unusual) use of a 6850. :)

Lawrence

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