I've been trying to come up with a truly low-cost 6502 platform. As the prices of low-end FPGAs are dropping well below the cost of a 'real' 6502, here is an FPGA board pre-configured as a 100MHz 6502 SOC with a serial port (and a serial bootloader)and a bunch of free IO pins. The board contains
-XC3S50 Spartan 3 FPGA and platform flash
-8K RAM/ROM
-59 IO ports (can be configured as 3.3V IO, serial ports etc)
-JTAG connector
-60MHz oscillator
-LED
-3.3V operation

As configured (8K RAM, 100MHz Arlet's 6502 core and UART) more than half the FPGA is free for customizing. I envision using it for control applications or just messing around.

The connectors can be soldered up as shown (I like wire wrapping face-up) or down. A DIP configuration is possible if only one row of connectors is mounted on either side.

I am trying to figure out manufacturing costs for a very small run. But I think $10 or very close is possible...

_________________
In theory, there is no difference between theory and practice. In practice, there is. ...Jan van de Snepscheut

That's very interesting. Things like this keep challenging the conventional view of what a microprocessor or a microcomputer is or does.

How are pins configured for serial? Does it emulate one of the VIA or what? How is the I/O space mapped?

I assume this is all "programmed" through the FPGA mechanisms, whatever that is. I don't know much about that stuff.

I am still trying to figure out the best configuration 'out-of-the-box'. I think a 6502 with a UART and a few 8-bit IO ports, with a simple serial bootloader (<128 bytes) so you don't have to mess around with FPGA stuff until you want to. Daryl's monitor is only 1K.

Right now I have the same RAM mapped as the first and last 8K, to cover vectors and page 0/1... On powerup the top RAM contains the bootloader. The LED is at C000 and UART at C008. But it's an FPGA and you can do anything.

My UART is prewired for (changeable of course) 115200 operation. It's pretty much like any other UART for data - check the status register for a bit, then read or write the data register. I could emulate something (ACIA?) at least as far as register mapping and status bits.

To permanenty store 6502 code or reconfigure the hardware you would have to get a Xilinx USB cable for about $45 and get the free Xilinx tools.

_________________
In theory, there is no difference between theory and practice. In practice, there is. ...Jan van de Snepscheut

It's a nice idea to have the RAM pre-loaded with a small monitor - you can do that in FPGA, and it gives you the benefits of a ROM with the advantage of being able to overwrite it.