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 Post subject: 6502 with EEPROM and RAM
PostPosted: Thu Jul 18, 2013 1:44 pm 
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Now that I'm comfortable with 6502 assembly, and basic electronics. I want to put my 65c02 to use on a breadboard.
Up until now, my only experience is with the NES variant 2A03. In the NES environment, the memory is mapped to different proprietary components like the PPU (picture processing unit) and the internal audio mechanics.

That being the case, I am a bit puzzled how I would go about "mapping" the memory addresses to other ICs.

For example, 0x2000 - 0x2007 on the NES controls the PPU. Addresses 0x4000 - 0x4017 handle various things like audio registers and gamepaid IO. Most of the ROM cartridges have specifications as well.

So far I have only dabbled with a simple "free run" test to make sure the proc is working. I don't want to just send NOPs forever.

My overall question, is how do you preset where the ROM memory starts vs the RAM? For instance, if I purchase an EEPROM, will it automatically have a standard or convention like "32K: maps 0x00 - 0x07FFF"? Then I could say that my ROM lives in "0x0800 - 0xFFFF".

Something else that I just don't get, is does the 6502 "store" memory in itself? Or is it simply that 0x00 - 0xFFFF are the addresses it can understand and that they must point to some other physical chip?

I'm open to any suggestions, discussion or constructive criticism to my understanding.

Thanks!

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PostPosted: Thu Jul 18, 2013 2:04 pm 
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Sounds like you are ready to do some address decoding.

May I recommend Garth Wilson's excellent 6502 primer: http://wilsonminesco.com/6502primer/index.html. Chapter 2 should answer your questions.

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PostPosted: Thu Jul 18, 2013 3:10 pm 
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Wow, thanks for the resource. I had seen the primer before, but that was a year ago when none of this made any sense to me. Thanks!

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PostPosted: Thu Jul 18, 2013 3:45 pm 
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To set you in the right direction based on your 32K device example, it works like this. In order to address 32K inside the device, address bits A0-A14 are necessary. The chip also has an 'enable' pin. Your address decoding logic will enable the device at the right time. For instance if you want the device to occupy the top 32K and the enable is normal, high=1 logic, then connecting the processor's A15 pin to EN will activate the device whenever the address is in the top 32K. Inverting A15 will select the device for the low 32K.

This is a little simplified (Garth's primer has many real examples). Ask questions if you get stuck and someone here will help.

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PostPosted: Thu Jul 18, 2013 4:34 pm 
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enso wrote:
Sounds like you are ready to do some address decoding.

May I recommend Garth Wilson's excellent 6502 primer: http://wilsonminesco.com/6502primer/index.html. Chapter 2 should answer your questions.

Also, if you peruse
my POC site you will see how I worked out decoding on that unit—I describe it in some detail, complete with schematics.

At a minimum, you need to decode some ROM (the reset and other 65xx vectors are at the top of address space), an I/O block (a 74AC138 is handy for I/O decoding) and, of course, RAM. Avoid the temptation to make it complicated. A real simple but effective memory map can be set up without a lot of logic hardware.

Be sure to read the data sheet for each device that you plan to install in your system so you know how to select it and what, if any, "gotchas" are present in the device.

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PostPosted: Thu Jul 18, 2013 4:44 pm 
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BTW, here's a chart that I created to help me figure out addressing on my POC V1 unit. It might help you out as well.

Attachment:
File comment: POC V1.0 Original Memory Map
sbc_v1_orig_mem_map.gif
sbc_v1_orig_mem_map.gif [ 59.26 KiB | Viewed 574 times ]

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