@GARTHWILSON
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I started to think about the banking decades ago, but it just wasn't worth doing when the 65816 is available
Oh dear, that looks like a whole other league! You have to consider that I’m only familiar with the NMOS 6502 / 6510. Not that I don’t want to expand my knowledge, but I think it wouldn’t be wrong to set some boundaries for my first homebrew computer. I probably would stick to the NMOS 6502 at 1,8432MHz. I don’t want to get lost in a too complex first try. Programming wise I want to stay close to the VIC-20 and C64. Or am I restricting myself too much by using regular NMOS instead of the WDC chips?
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Don't forget the '154 which might be better than a pair of 138's. How many I/O ICs do you want though?
Yes that would be a better one!
I’m not sure either, I just want to be on the safe side
I was thinking of VGA, keyboard, joystick, ACIA, 65SPI, VIA’s, SID’s.
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I'd probably want the ROM WE to be controlled by a manual switch
I actually had that in mind with a jumper, but a switch is more convenient.
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Dallas has SRAM modules
I wasn’t aware of them.
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In another topic, we were discussing getting a tiny bootloader loaded into RAM by way of manual switches, just enough to have something that works to load the rest from a serial port or mass-storage device.
Unfortunately I can’t find it, do you have a link? Is it this topic?
viewtopic.php?f=12&t=2705What about having a 16k EPROM and RAM occupying the same space, and during a cold boot the EPROM is active and copies itself to RAM. But that has been certainly been thought of.
@BigEd
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Let's not get sidetracked into the '816 every time banking comes up! It's perfectly reasonable to put banked memory into a 6502 system.
I would put a charset or a startup bitmap in one of the ROM banks. So it’s more like for data storage then the need of programming space.
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you could always give two adjacent blocks to one greedy device
that’s a good idea, the SID needs 29 bytes I believe.
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If your peripherals will include a way to load code from a storage device or a PC, then you only need enough ROM to hold your bootstrap and enough of the OS to support it. 48k RAM, 8k ROM might be a good mix.
There seems no ideal place to put the I/O: right up in FE00 or the lower half of FF00 is the tidiest. Page 2 was a recent novel idea, and well be a good plan, because pages 0 and 1 are both fixed and special, and then you can have the maximum span of RAM from 0300 upwards.
I noticed that Daryl’s OS and Lee’s EhBASIC make use of those lower regions, so that in consideration, I would come up with:
Code:
0000 zeropage
0100 stack
0200 512 bytes (the first 1k always bank 0)
0400 8 banks of 47k RAM
C000 8 banks of 16k ROM (battery backed and write protected RAM)
FE00 I/O 0
FE10 I/O 1
FE20 I/O 2
FE30 I/O 3
.
.
.
FEF0 I/O F
FF00 rest of ROM
RAM 628512 SRAM
ROM 628128 SRAM (battery backed and write protected)
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On the 65C02 you could use all of page $FF as the processor will assert VPB when accessing the fixed vectors and this could be used to direct the access to a ROM rather than an I/O chip.
ok, I have to resign and read that datasheet of the 65C02