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PostPosted: Wed Feb 13, 2013 6:31 pm 
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Hi Guys,

I'm looking for a WDC65C02S in a DIP-40 package but I have no money. Is there anyone in the Michigan area with a spare that might consider trading me for some old books I found in storage (circa 1979-1981)? The books are in excellent condition. Here's what I have;

(1) Programming the 6502, Rodney Zaks, Sybex.
(2) 6502 Applications Book, Rodney Zaks, Sybex (including purchase receipt, 10/12/79)
(3) 6502 Software Gourmet Guide & Cookbook, Robert Findley, Scelbi Publications
(4) Apple Machine Language, Don Inman & Kurt Inman, Reston Publishing Company, Inc.

Thanks much...

Cheerful regards, Mike McLaren


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PostPosted: Thu Feb 14, 2013 5:12 am 
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Michael wrote:
Hi Guys,

I'm looking for a WDC65C02S in a DIP-40 package but I have no money. Is there anyone in the Michigan area with a spare that might consider trading me for some old books I found in storage (circa 1979-1981)? The books are in excellent condition. Here's what I have;

(1) Programming the 6502, Rodney Zaks, Sybex.
(2) 6502 Applications Book, Rodney Zaks, Sybex (including purchase receipt, 10/12/79)
(3) 6502 Software Gourmet Guide & Cookbook, Robert Findley, Scelbi Publications
(4) Apple Machine Language, Don Inman & Kurt Inman, Reston Publishing Company, Inc.

Thanks much...

Cheerful regards, Mike McLaren

Does it have to be a 65C02? If you can instead use a 65C816 (PLCC44) I'll toss one in the mail to you—no charge.

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PostPosted: Thu Feb 14, 2013 9:16 pm 
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Greetings,

Thank you for the kind offer. I really appreciate it. Unfortunately, I'm not sure I can handle the mux'd bank data on the '816. I'm trying to use a PIC as a ROM/Monitor boot loader of sorts.

Thank you again...

Cheerful regards, Mike, K8LH (Michigan, USA)


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PostPosted: Thu Feb 14, 2013 9:43 pm 
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Quote:
Unfortunately, I'm not sure I can handle the mux'd bank data on the '816.

Again, if you don't need more than 64K of address space, you can totally ignore the bank byte, and still get a ton of benefits from the '816. You don't have to latch, decode, or use the bank byte. Just make sure nothing is putting data on the data bus during phase 1 when the processor is putting the bank byte out (which you will ignore), and you'll be fine.

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PostPosted: Fri Feb 15, 2013 1:05 am 
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Gosh, I appreciate the offer from BDD and the gentle nudge toward what I suspect is a much nicer processor with a lot more capabilities. I'm just not that familiar with the '816 which means I'd have much more research ahead of me before I would be able to do something useful with it (I'm a slow learner). I'd also have to dig up a PLCC-44 socket.

I came close to finding a 65C02 today. I cleared a path to a closet full of old Apple stuff and up on one of the shelves with boxes of spare parts I found an Apple //c system board. Inside was a new replacement board minus the 65C02 processor (bummer!). Also found a stash of Apple II ROM sets, including a Programmer's AID #1 ROM (341-0016-00), and some Apple //e ROM sets, including some of the 40 pin MMU (344-0010) and IOU (344-0020) chips. I also found a couple NMOS 6502A processors.

Do I understand correctly that I can't stop the clock on the NMOS 6502 because the internal registers are dynamic rather than static? If that's the case, then it seems I really need the 65C02, yes, no? Briefly, here's what I'd like to do. I've got an 80-nsec Toshiba 512K x 8 SRAM chip that I'd like to use as a single 64KB block with the 65C02. I'd like to use a PIC microcontroller to generate the processor clock signal and to load a monitor program into RAM at start up. I'd like to come up with some sort of Kim/Sym/Aim type front panel that would allow me to modify memory and run or single step the processor. Any input is welcome.

Thanks guys... Regards, Mike


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PostPosted: Fri Feb 15, 2013 2:42 am 
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Michael wrote:
Unfortunately, I'm not sure I can handle the mux'd bank data on the '816.

My POC unit ignores the bank. As Garth noted, just keep the data bus clear during Ø2 low.

Quote:
I'm just not that familiar with the '816 which means I'd have much more research ahead of me before I would be able to do something useful with it (I'm a slow learner). I'd also have to dig up a PLCC-44 socket.

At power-on or reset, the '816 starts in emulation mode, making it look almost exactly like a 65C02. So there is no initial learning curve. As for the socket, I can furnish you one that mounts on a 0.100" grid, making it compatible with standard perf board.

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PostPosted: Fri Feb 15, 2013 3:26 am 
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Michael wrote:
I'd also have to dig up a PLCC-44 socket.

The '816 is available in DIP as well.
Image
Quote:
Do I understand correctly that I can't stop the clock on the NMOS 6502 because the internal registers are dynamic rather than static?

Right. Non-WDC 65c02's can be stopped indefinitely with phase 2 high, and the WDC ones made in the last 15+ years can be stopped in either phase. NMOS ones will lose their registers' contents if you stop them. You'll want the CMOS anyway for the extra instructions and addressing modes and the fact that the bugs are fixed.

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I'd like to come up with some sort of Kim/Sym/Aim type front panel that would allow me to modify memory and run or single step the processor. Any input is welcome.

The AIM-65 computer with the NMOS 6502 used a circuit that caused an interrupt at every instruction IIRC to get it into the monitor program. IOW, it didn't really stop, but after each instruction, you'd be put in a routine that let you look around at the registers and status and memory. With a CMOS one you can actually single-cycle it and see what's on the buses at each phase-2-high time, which would mean two to seven times per instruction. If you feed the clock circuit with a pushbutton, you'll have to debounce it. This is discussed in the primer at http://wilsonminesco.com/6502primer/ClkGen.html.

I'm 2000 miles away from you (you originally said "in the Michigan area), but unless I were in your neighborhood, there's going to be postage or driving expense anyway, so maybe I should just send you a 65c02 from here. It will probably be a 2MHz Rockwell one; but I'm not sure the newer 14+ MHz ones are best for new builders anyway. (I do have 816's, but not in DIP like I have 65c02's and 6512's and a few 6502's.)

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PostPosted: Fri Feb 15, 2013 3:42 am 
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(Oops! Lots of activity on this topic just as I finished preparing to post!)

Hi, Michael. Allow me to echo the nudge (so to speak :roll: ) toward the '816. Maybe it's hard to believe that this SuperProcessor has a secret identity, and is willing to play the role of a meek, mild-mannered 65C02. But that is the case. Without any action by you, it'll automatically power up in emulation mode and stay there as long as desired -- indefinitely, if need be. As BDD says, the learning curve isn't a prerequisite.

But if DIP-ness and 8-bit-hood are what make you comfortable then I'm willing to donate a Rockwell 'C02 to your cause. Or accept Garth's offer. You are right, BTW, about not being able to stop the clock on an NMOS part. (The RDY input can be used to single-step an NMOS chip without stopping the clock but that's more nuisance than it's worth, IMO. The interrupt technique Garth mentioned is better. Or stick with your plan to actually stop the clock.)

Quote:
I'd like to use a PIC microcontroller to generate the processor clock signal and to load a monitor program into RAM at start up.
How exactly do you plan for the PIC to write to the 65xx's RAM? Are you planning to float (tri-state) the 65xx address bus so the PIC can temporarily assume control of those lines? NB: Rockwell parts have no BE input and thus cannot float the address bus.

FWIW there's an alternative technique, one which doesn't require the 65xx to tri-state the address lines. It drastically reduces both the amount of wiring for the load circuitry and the number of I/O ports lines the PIC will need. Mainly you would need just 8 output bits from the PIC (not 24) plus a few more bits used as strobes. It's something I planned to write up "someday" for 6502.org. Maybe the time has come.

cheers,
Jeff
ps- a brief explanation (and not very beginner-friendly): Need to write, say, EA to address 200? Clock the following bytes onto the data bus one by one: A9 EA 8D 00 02. Some simple preliminary steps cause the CPU to digest this as a two-instruction program: LDA #$EA then STA $200. Repeat as required for subsequent bytes to be loaded. A simple hardware hook prevents bus contention.

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PostPosted: Fri Feb 15, 2013 4:58 am 
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GARTHWILSON wrote:
NMOS ones will lose their registers' contents if you stop them. You'll want the CMOS anyway for the extra instructions and addressing modes and the fact that the bugs are fixed.

In fact, the NMOS part will lose register contents if the Ø2 is too slow. I don't recall anymore the minimum frequency though.

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PostPosted: Fri Feb 15, 2013 5:17 am 
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I think 100kHz was generally the minimum recommended speed for NMOS. NMOS didn't really save much power by slowing it way down though, so there wasn't much point in doing so. CMOS OTOH takes virtually no power as you bring it to a crawl. In a commercial product I designed in the late 1980's, I made it run at 140kHz most of the time to save battery power, and kicked it up to a MHz when it had a long string of floating-point calculations to do. (Today I would probably do it all in scaled-integer, saving a lot of processing power; but I had not been introduced to the possibilites of that yet in the late 1980's.) IIRC, the entire computer, with LCD, took only a couple of mA at 140kHz.

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PostPosted: Fri Feb 15, 2013 7:21 am 
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Thank you, Gentlemen. I'd love to take one of you up on your kind offer of a 65C02. May I send you my address in a PM, please?

Dr Jefyll wrote:
Quote:
I'd like to use a PIC microcontroller to generate the processor clock signal and to load a monitor program into RAM at start up.

How exactly do you plan for the PIC to write to the 65xx's RAM? Are you planning to float (tri-state) the 65xx address bus so the PIC can temporarily assume control of those lines? NB: Rockwell parts have no BE input and thus cannot float the address bus.

FWIW there's an alternative technique, one which doesn't require the 65xx to tri-state the address lines. It drastically reduces both the amount of wiring for the load circuitry and the number of I/O ports lines the PIC will need. Mainly you would need just 8 output bits from the PIC (not 24) plus a few more bits used as strobes. It's something I planned to write up "someday" for 6502.org. Maybe the time has come.

I was hoping I could do it much like the "alternative technique" you described. That is, at startup the PIC would send six clock pulses to the 65C02 and then put two address bytes onto the data buss when the cpu reads the reset vector lo and hi bytes from addresses $FFFC and $FFFD. Then the PIC would supply $A9 {data} and $8D {address} data during the appropriate cycles. The 65C02 will always be in control of the address lines but the PIC will qualify the SRAM /OE line so the 65C02 will be reading data from the PIC and writing data to SRAM during this process. The PIC will provide a $4C instruction and address bytes to start the Monitor once it has been loaded into RAM.

I wonder if I can implement memory mapped I/O in software on the PIC? I saw someone using a pair of 74HC244 latches/drivers with the address lines on the inputs and the outputs on the data bus. The PIC would have to enable each '244 in turn to read the 16 bit address quickly, before the data buss goes active. I'm hoping some I/O could be handled directly by the PIC. For example, can I assign a set of addresses to access one or more PIC 8-bit ports, a set of addresses for several 7-segment displays, a set of addresses for one or more PIC serial ports, for a character LCD, for an SD card, for a keypad or PS/2 keyboard? Could the PIC recognize sets of addresses and provide the select lines for other devices?

Is it possible to build a low parts count SBC (PIC, SRAM, CPU, 2x 74HC244) with the ability to select from a palette of PIC I/O functions and to change the Monitor or memory map and I/O decoding, all in software rather than hardware? I really don't know but I think it would be fun to try.

Cheerful regards, Mike


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PostPosted: Fri Feb 15, 2013 7:45 am 
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You can PM me your address.  But if I understand what you're thinking of doing, the PIC is absolutely nowhere near fast enough.  You cannot use it as programmable logic at any decent rate for things like address decoding.  What you could do however is use the Parallel Slave Port (which would be given an address in the 6502's memory map by separate logic). You can put it right on the processor's data bus, but it's slower than something like a 6522 because you have to for example write the data to the PIC, then give it enough time to see it and do something with that info, then come back again and tell it what it's supposed to do with that data, then again give it more time to process it, maybe polling it in between to see when it's ready for the next thing, and so on. If you want to read data, you'll tell it what you want to read, give it time to get that data ready to output, come back later to read it, etc.. For this reason it would be better to use the PSP only if the amount of data is rather small compared to the job the PIC will be doing with it.  Edit, 10/19/18:  Microchip's ap. note AN579, about using the PSP, is at http://ww1.microchip.com/downloads/en/A ... 00579b.pdf .

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PostPosted: Fri Feb 15, 2013 8:02 am 
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Welcome, Michael!

Garth: if the PIC controls the clock (maybe by toggling an output pin) then surely it's fast enough to control everything it needs to - it just needs to sort everything out between each clock toggle.

Cheers
Ed


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PostPosted: Fri Feb 15, 2013 8:27 am 
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That would be fine for loading the RAM, but would take lots of PIC instructions per 6502 half cycle after you want to get going and actually accomplish something.  So yeah, it could be done, but I think the slowness would be discouraging.  Also, if you wanted to put something with a timer on the bus that depended on a constant-rate phase 2 (like the VIA's timers do), I think you would again have problems unless you slowed things down even more to have the PIC do another clock edge based on interrupts from its own timers.  It could be done, but I don't recommend it.

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PostPosted: Fri Feb 15, 2013 1:05 pm 
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BigEd wrote:
Welcome, Michael!

Garth: if the PIC controls the clock (maybe by toggling an output pin) then surely it's fast enough to control everything it needs to - it just needs to sort everything out between each clock toggle.

Cheers
Ed


It sounds like this project I posted about. They use the PIC as ROM.

http://hackaday.com/2013/02/08/another- ... /#comments

Another take on the 6502 computer

viewtopic.php?f=4&t=2436

Mike,

I would love to learn how to do this. I have a Pikit 2 and some basic pics.

I know where to get the 6502s and I wouldn't mind sending you some but I would love more to learn how to do it on a 65C816S.

Chuck


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