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PostPosted: Sat Jun 29, 2013 4:10 am 
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What I started doing in 1988 is now a working system which has been running stable for several months. The design (then and now) was a tiny CPU card that has the CPU, RAM/ROM, clocking, read/write control, I/O decode and selects on a single header, no on-board I/O. All CMOS - even had the original sourced RCA chips (74HCT-00, -30, -138), a R65C02 2MHz part. Hitachi 64256 CMOS static RAM and a Intel 32KB CMOS EPROM (both 28-pin DIP)... had Hi-Rel sockets and a small perf-board too. It sat for decades in a box... kids growing up, divorce, job with high travel, etc. Life is good... so;

Then I found new WDC chips on Mouser a couple years ago and just bought some 65C02, 65C21 and 65C22 chips to have (still have several Vic-20 and C-64 machines too). Also found ExpressPCB some years ago but never really did anything with it. End of last year, I started searching around for software... found the 6502.org site and was looking at the WDC site plus others including other folks who have made their own systems. The past 5 months have been spent putting a system together to do the work to build systems from scratch and hopefully get them working.

So I've now managed to get a two board minimal system running on the ExpressPCB MiniBoard Pro service format of 3.8" x 2.5", so I now have 3 running systems :mrgreen:

As I've not seen many detailed descriptions of how others are doing their end-to-end development, I thought I'd outline what I eventually did... and yea, I spent some $$ on SW and HW along the way. Being an OSX user (MacBook goes everywhere globally with me, main work machine for the real job). For all of the "fun stuff", I built a custo-Mac based on an Intel mini-ITX board, Core i7 quad-core Ivybridge CPU, 16GB DDR3-1600 memory and two Intel SSD drives (600GB total). I run Mountain Lion 10.8.4 with HD4000 graphics and use VMware Fusion Pro for many VMs, Windows included. So I configured a VM of the following:
- 64-bit OS with 3D-graphics, video, sound, USB, LAN, etc.
- 2 CPU cores
- 2GB Memory
- 64GB disk
- Win7 Pro 64-bit OS installed

above VM has two hardware devices assigned to it via USB:
- FTDI USB to RS-232 interface - provides Serial COM port to Windows (used by Putty as console) ($)
- DataMan MemPro Programmer (yea, I splurged) ($$$$)

Software:
- WDC TIDE system (Pro SDK) which integrates their assemblers, compilers, linker, debuggers. etc. into one window so to speak. ($)
- UltraEdit Pro - WDC links it from TIDE, seems to be their preferred editor, and it is very nice. ($$)
- Added the usual, like FireFox (no IE), Adobe Reader
- DataMan Software package - it is good... very flexible, detailed device support, huge supported device list, etc.
- Putty (terminal software package)
- ExpressPCB package for schematics and PCBs

So, two boards have been completed and have been running for a couple months. I cheated up front on the SW side to ensure I had the HW sorted properly. Basically took SyMonIII, relocated the upper 1K, and freed up the top 1KB sans the HW vectors, then carved out page $FE00 for I/O (my board has page $FE00 decoded for I/O and 8 selects at 16-bytes wide). I used page $FF00 for a JMP table to all of his documented routines (which most all have moved) and many 65C02 Opcodes now in play, so no way it runs on a normal 6502. Still have around 500 bytes free in upper 8KB. Many thanks to Brian Phelps for making his source available.

Boards:
CPU:
- WDC65C02 CPU
- 32KB CMOS static RAM
- Atmel 28C256 EEPROM
- 74HCT00/74HCT30 provide ROM-I/O select and RD/WR clocking
- 74HCT138 provides 8-decoded I/O selects
- Small can OSC - clocks up to 6MHz are fine using ancient Synertek 6551
- DS1813 reset chip and pushbutton
- small DC power receptable, micro toggle switch and LED indicator
- 30-pin IDC header for I/O - jumper for BUS power, Poly Fuse, many caps
- RO/RW jumper for EEPROM

I/O:
- WD65C22 VIA - $FE00
- DB25 connector for parallel port - Port-B is main data drive w/some Port-A lines for status, reset. etc.
- 14-pin IDC header Port-A with power (some lines shared with DB25)
- 6551 ACIA - $FE20
- MAX238
- DB9 full function serial port
- selectable bus or onboard power
- 30-pin IDC header for CPU connect
- selectable IRQ/NMI for 6522/6551
- onboard xtal, power receptacle, LED indicator, Poly Fuse, many caps

Boards are connected via a 2.5" ribbon cable, single power drive from CPU currently configured. Runs from 5V DC, also runs for a couple days from a 4-cell 2700ma/hr NiMH AA pack.

A pic here:
Attachment:
65C02-CPU-IO.jpg
65C02-CPU-IO.jpg [ 1.01 MiB | Viewed 736 times ]


It's a solid running system that I can start with to develop additional software from with known working hardware. It's been a fun project overall, but not exactly inexpensive. However, from saving source, assemble/link, to load and program the EEPROM is under a minute unless you're a slow "mouser" :shock:

For the next I/O board, I'm thinking a 65C21 and a realtime clock, we'll see, more options available.

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PostPosted: Sat Jun 29, 2013 5:56 am 
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Very interesting - good idea to write up the whole story. Thanks.
I'm just a little curious about the code generated by WDC's compiler - if the licence allows, a thread with some snippets would be interesting (if it doesn't degenerate into sniping)
Cheers
Ed


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PostPosted: Sat Jun 29, 2013 8:05 pm 
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floobydust wrote:
So, two boards have been completed and have been running for a couple months....

Looks good. In the future, you might want to consider using the PLCC versions of the 'C02, 'C22, etc. You can make a smaller and tighter layout with them.

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PostPosted: Sat Jun 29, 2013 8:06 pm 
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BigEd wrote:
Very interesting - good idea to write up the whole story. Thanks.
I'm just a little curious about the code generated by WDC's compiler - if the licence allows, a thread with some snippets would be interesting (if it doesn't degenerate into sniping)
Cheers
Ed

Perhaps some screen shots as well.

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PostPosted: Sat Jun 29, 2013 8:51 pm 
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Thanks all,

I've not yet used the C compiler so have no idea what the output looks like. The Assembler/Linker generates an object file, listing file and a Motorola S19 format file, which I load and apply a negative offset with the Dataman SW, then burn it. I already did a schematic and physical layout using all PLCC chips and some SMT logic. Much tighter integration but still needs time to finish the land patterns... a lot of work. Here's a pic of some overlapped windows for the system. Currently running in a 1650x1080 window under Fusion. I should max it full screen at 1920x1200.

Attachment:
Win7-65xx-dev.jpg
Win7-65xx-dev.jpg [ 677.39 KiB | Viewed 700 times ]

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