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PostPosted: Mon Aug 20, 2012 4:57 am 
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Dajgoro wrote:
Yes, but then i am stuck with ExpressPCB...

You're "stuck" only to the extent that you can't export the netlists. However, you can print your schematics and should the need arise to move to some other CAD, you can redraw in that CAD. You asked for free, so you can't expect too much in exchange for nothing. :D

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I remember i once tried Eagle, but i couldn't figure out how it works...

Can't help you there. I don't, and never have, used Eagle.

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PostPosted: Mon Aug 20, 2012 7:57 am 
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Express PCB is OK if you just want to draw schematics or use their board manufacturing process. Unfortunately they print a pattern of dots over the PCB to stop you using print outs for PCB photo etching

Eagle is a bit complex to start with but you do get used to it after a while. The free version has severe board size limitations.

DesignSpark from RS is a bit easier than Eagle and does not have the size limits. Its also completely free and you can export standard PCB/drilling files for use with any production service.

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PostPosted: Mon Aug 20, 2012 3:21 pm 
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BitWise wrote:
Express PCB is OK if you just want to draw schematics or use their board manufacturing process. Unfortunately they print a pattern of dots over the PCB to stop you using print outs for PCB photo etching

You can disable the grid if you want. Go to View -> Options and uncheck the Show Grid checkbox. I've been able to print transparencies that way.

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Eagle is a bit complex to start with but you do get used to it after a while. The free version has severe board size limitations.

The free version also limits you to a single schematic sheet. As I alluded, don't expect a lot when you pay nothing.

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DesignSpark from RS is a bit easier than Eagle and does not have the size limits. Its also completely free and you can export standard PCB/drilling files for use with any production service.

Also, take a look at Kicad.

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PostPosted: Wed Aug 22, 2012 7:39 pm 
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Is there any good reason why i should buy 10ns ram, instead of using the regular 70ns, since the slowest point is the eeprom?


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PostPosted: Wed Aug 22, 2012 7:58 pm 
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Dajgoro wrote:
Is there any good reason why i should buy 10ns ram, instead of using the regular 70ns, since the slowest point is the eeprom?

Of course there is. Why limit your system's capabilities to the EEPROM's access time? You can always wait-state the EEPROM if necessary, and if RAM is in large supply, shadow the EEPROM into RAM, at which time you'll benefit from much faster access.

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PostPosted: Wed Aug 22, 2012 8:26 pm 
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Hmm... I think the price is going to be the deciding factor here...


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PostPosted: Tue Nov 13, 2012 4:21 am 
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Looking at how i could interface the MC6844 i just got more confused. How does the MC6844 sync the phi2 clock while reading or writing. Or to put it simply: Who generates the phi2 (E on Motorola bus) clock during DMA cycles? I can't find any reference about the MC6844 and 6502 on the web.


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PostPosted: Tue Nov 13, 2012 5:02 am 
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http://www.alldatasheet.com/datasheet-p ... C6844.html
Looks like the 6844's E pin is strictly an input, Dajgoro. I'd give it the very same clock signal as the CPU gets (unless you need to stretch the CPU clock).

J :)

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PostPosted: Tue Nov 13, 2012 3:52 pm 
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So what are you saying is that the dma syncs with the cpu, and that i only have to disable the cpu data and address, and listen to the dma r/w signal?

As for the r/w, the pin is bidirectional. So instead of spending an entire socket for a tristate switch, i was thinking about using a resistor. So when the pin is in input mode, the signal goes through a resistor, and when the pin is in output mode it won't be affected, because the resistor is preventing the conflict.


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PostPosted: Tue Nov 13, 2012 4:43 pm 
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Quote:
i was thinking about using a resistor
Hmm, so you're saying that the (non-tristateable) R/W pin on the CPU drives a resistor and the resistor drives "System R/W" (the signal that's gated with PHI2 aka E to produce WE and OE for memory & I-O). Also connected to System R/W is the bidirectional R/W pin on the 6844. Is that right?

Yeah you could get away with that if you're careful. When the 6844 is in charge it will have no problem driving System R/W but the CPU might (due to the resistor). Ideally System R/W will be a signal that sees only a high impedance, low capacitance load (ie, MOS inputs, not TTL, and the fewer the better). This is to minimize DC loading and RC delay.

If you make the resistor value too low then (when the 6844 is in charge) DC loading (contention against the CPU and resistor) may prevent System R/W from reaching valid levels. If you make the resistor value too high then (when the CPU is in charge) RC delay will prevent Sytem R/W from meeting its timing deadline. Presumably it needs to be valid before the rising edge of PHI2 aka E.

cheers
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PostPosted: Tue Nov 13, 2012 5:41 pm 
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For the r/w pin i had the idea with the resistor, but not as simply as putting a resistor and hoping that it will work. I would have a 2 to 1 mux(cpu and dma r/w inputs) that would switch depending who is generating the r/w signal. When the cpu is generating the r/w signal the cpu r/w pin would be connected through a buffer that is then connected to a resistor, and then to the dma r/w. When the dma generates the r/w it would override the cpu's r/w signal since it is coming through a resistor. Soooo what value would suit? What about 1k?

I need to minimize the glue logic to the max, since i have very little free real estate left, the dma, mmu, 4x ram, zif socket for rom, cpu tristate buffers, and bus amplifiers took like 80% of the pcb.


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PostPosted: Tue Nov 13, 2012 6:10 pm 
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Dajgoro wrote:
For the r/w pin i had the idea with the resistor, but not as simply as putting a resistor and hoping that it will work. I would have a 2 to 1 mux(cpu and dma r/w inputs) that would switch depending who is generating the r/w signal. When the cpu is generating the r/w signal the cpu r/w pin would be connected through a buffer that is then connected to a resistor, and then to the dma r/w. When the dma generates the r/w it would override the cpu's r/w signal since it is coming through a resistor. Soooo what value would suit? What about 1k?

I need to minimize the glue logic to the max, since i have very little free real estate left, the dma, mmu, 4x ram, zif socket for rom, cpu tristate buffers, and bus amplifiers took like 80% of the pcb.

If you're using the 65C02 you can sink its BE (bus enable) input and the MPU will tri-state. No such luck with the NMOS 6502 however.

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PostPosted: Tue Nov 13, 2012 6:34 pm 
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Quote:
Soooo what value would suit? What about 1k?

1K with even 50pF makes for a time constant of 50ns. That is a huge time delay for this! That's why we don't use resistors much in computer circuits.

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PostPosted: Tue Nov 13, 2012 6:48 pm 
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BigDumbDinosaur wrote:
If you're using the 65C02 you can sink its BE (bus enable) input and the MPU will tri-state.
Yeah, then you could eliminate the tristate buffers. Not all 65C02's have the BE input, though. (Rockwell's doesn't.)

GARTHWILSON wrote:
1K with even 50pF makes for a time constant of 50ns. That is a huge time delay for this!
Agreed, 50 pf would be a problem, but it needn't be as high as that. Are we all on the same page here? Dajgoro's explanation seems unclear at best, and maybe mine wasn't so great either. A diagram will help; here's how I'd do it.
Attachment:
R-W.gif
R-W.gif [ 3.64 KiB | Viewed 596 times ]
Notice we're not using the resistor to drive an entire bus, just a few inputs. (In this version I've reduced it to two.) So that's, like, 10 pf, isn't it?

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Last edited by Dr Jefyll on Tue Nov 13, 2012 7:03 pm, edited 1 time in total.

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PostPosted: Tue Nov 13, 2012 7:01 pm 
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So that's, like, 5 pf, isn't it?

There would be 5pF (typical?) for the input it drives, at least that much if not more for the output it drives, a little for the sockets, and some more for board traces, right? It still won't be 50pF then if it's not a whole bus, but probably a lot more than 5. The resistor should be the lowest value that the 6844 can drive. I can't take the time to study the data sheets right now, but if the 6844 has to pull up (which I expect it's weaker at) when the CPU is pulling down (which it will be stronger at), that resistor value may have to be much higher. For example, if it can only pull up with 400uA at 3V and the other end of the resistor is getting grounded, that's 7.5K. 7.5K and 10pF makes for a 75ns time constant.

Just going through the numbers though makes me want to actually try it, since if NMOS pull-ups are really as weak as the data books say, like pulling up to 2.4V with only 100uA for a Synertec NMOS 6502, I don't think it could charge even a mild load capacitance and meet its own timing requirements. The WDC CMOS outputs are much, much stronger than they say.

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