There's an impressively extensive collection of ASCII diagrams of chip pinouts at
http://web.archive.org/web/201208240622 ... index.html(and as noted below by enso, also directly, at
http://kingswood-consulting.co.uk/giicm)
From
Code:
7400
Quad 2-input NAND gates.
+---+--+---+ +---+---*---+ __
1A |1 +--+ 14| VCC | A | B |/Y | /Y = AB
1B |2 13| 4B +===+===*===+
/1Y |3 12| 4A | 0 | 0 | 1 |
2A |4 7400 11| /4Y | 0 | 1 | 1 |
2B |5 10| 3B | 1 | 0 | 1 |
/2Y |6 9| 3A | 1 | 1 | 0 |
GND |7 8| /3Y +---+---*---+
+----------+
To
Code:
MOS Technologies 6502 CPU.
+-----+--+-----+
GND |1 +--+ 40| /RST
RDY |2 39| P2
P1 |3 38| /SO
/IRQ |4 37| P0 (in)
|5 36|
/NMI |6 35|
SYNC |7 34| R//W
VCC |8 33| D0
A0 |9 32| D1
A1 |10 6502 31| D2
A2 |11 65SC02 30| D3
A3 |12 29| D4
A4 |13 28| D5
A5 |14 27| D6
A6 |15 26| D7
A7 |16 25| A15
A8 |17 24| A14
A9 |18 23| A13
A10 |19 22| A12
A11 |20 21| GND
+--------------+