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PostPosted: Mon May 23, 2011 11:08 pm 
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I read this today. It may not be as expensive as you have thought.

http://forums.parallax.com/showthread.p ... ost1002672


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PostPosted: Tue May 24, 2011 6:11 pm 
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Thanks for the link - it's good information!

As he says, the manufacturing costs are modest: that's why you can buy a billion transistors for a few dollars (think of a USB stick) - but it's the setup costs which get in the way of small-scale projects.

Here's a price list (pdf) for austriamicrosystems' prototyping service which seems to offer a $10k price for 30 chips (and more if you want them)

As the man says - FPGAs are very attractive!

Cheers
Ed


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PostPosted: Tue May 24, 2011 7:15 pm 
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Thank you for your information. My other friends were given a quote from Altera. They were quoted 10,000 units for half a million dollars which if correct means there are other things involved and they can't be bothered unless there is a lot of money in it.


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PostPosted: Tue May 24, 2011 7:39 pm 
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Interesting - $50 per chip at that volume, versus $333 . It's all about volume (and some outfits are prepared to engage at the lower end, others are not)

At least in the case of AMS, and probably in both cases, this is manufacturing only: you get to design your own chip, and if you make a mistake, you get to go around again. So FPGAs are likely to be involved in the development process!

Lattice used to have a business model of direct selling of an FPGA design as a preprogrammed and tested part, with an optional logo printed on it. It was still an FPGA inside though.

I notice Altera have a business of remanufacturing an FPGA design as an ASIC chip - perhaps that's what you got the quote for. So, unlike the AMS case, you wouldn't be doing custom design and shipping GDS mask data, you'd be shipping an FPGA design to them. Much lower risk, probably lower density and performance (because it will be laid out like an FPGA) and so higher cost (because it will be a bigger chip).

The AMS offering is cheap because it's a multi-project wafer, so the mask-making cost is spread over several chip projects. That limits the number of useful chips per wafer but keeps down the per-project cost.

Cheers
Ed


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PostPosted: Tue May 24, 2011 8:32 pm 
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This was the discussion on the Natami website about their FPGA and it mentions the half a million dollar quote. Someone posted some links. There are also some links on the Parallax website in the link I gave you. Very interesting stuff.

http://www.natami.net/knowledge.php?b=6&note=38915

I was also reading a Commodore 64 CPLD project:
http://dangerousprototypes.com/2011/05/ ... y-project/

There is so much stuff.


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