Interesting - $50 per chip at that volume, versus $333 . It's all about volume (and some outfits are prepared to engage at the lower end, others are not)
At least in the case of AMS, and probably in both cases, this is manufacturing only: you get to design your own chip, and if you make a mistake, you get to go around again. So FPGAs are likely to be involved in the development process!
Lattice used to have a business model of direct selling of an FPGA design as a preprogrammed and tested part, with an optional logo printed on it. It was still an FPGA inside though.
I notice Altera have a
business of remanufacturing an FPGA design as an ASIC chip - perhaps that's what you got the quote for. So, unlike the AMS case, you wouldn't be doing custom design and shipping GDS mask data, you'd be shipping an FPGA design to them. Much lower risk, probably lower density and performance (because it will be laid out like an FPGA) and so higher cost (because it will be a bigger chip).
The AMS offering is cheap because it's a multi-project wafer, so the mask-making cost is spread over several chip projects. That limits the number of useful chips per wafer but keeps down the per-project cost.
Cheers
Ed