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 Post subject: asynchronous SRAM
PostPosted: Wed Apr 04, 2007 6:40 pm 
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Joined: Fri Jul 28, 2006 12:12 am
Posts: 27
What is everyone's opinion on using Asynchronous as apposed to Synchronous SRAM. The Asyrchronous is a bit cheaper. What are the drawbacks other than wait-states?


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PostPosted: Thu Apr 05, 2007 5:40 pm 
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I'm assuming you're talking with specific reference to using 65xx architecture devices.

ASRAM is modeled as a mathematical function: you give it an address, and data at that address comes out, some time later (or, data goes in). And, provided you have fast enough ASRAM, you can directly drive it with a 65xx device.

SSRAM, however, is a state machine. You give it an address, and some time later, you get the data at that address. If you're in need of data immediately following what you just got, that's available almost instantaneously (in the next clock cycle). It's only when "jumping around" in the memory that you have to wait. SSRAM and SDRAMs are designed for use with caches, where the normal mode of operation is the sequential access of large quantities of data.

Note that some SSRAMs allow for pipelined bus architectures, like those that PowerPC supports. This allows you to utilize the wait-states from one memory request to issue requests for memory elsewhere later on. While your access latency is still the same, the fact that you're essentially multitasking on the RAM bus means that you're more efficient time-wise.

Since most 65xx devices rarely exceed 10MHz, the need for SSRAM is minimal. Above 10MHz, though, SSRAM becomes appealing, but only if you're making sequential accesses. Since this almost never happens on the 65xx platform, you'll need something like a high-speed cache controller to amortize the wait states.


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