BigDumbDinosaur wrote:
Uh...there is no PLK instruction. In fact there is no direct programmatic means by which PB[color=#000000] can be modified.
I think that's a typo for PLB, which is "pull data bank register from stack".
Thus, my suggestion of getting a value into A, pushing it, then popping it out into the PDR with the PLB instruction. Maybe this doesn't meet your definition of "direct". (What would?)
Chromatix wrote:
The new registers in the '816 - PBR, DBR, DPR - are active and effective even in Emulation mode. Their default values out of reset give the same behaviour as a 65C02, but if you change them, they take effect immediately, even if you haven't switched to Native mode.
Ahah! Thanks. I'm certain that I read that in emulation mode, the high 8 bits of instruction fetch addresses were forced to zero, ignoring PBR. But I can't find that now, so I must have made it up or misunderstood something.
Since A15 and A21 are swapped, in emulation mode 0x20 bank addresses will be the RAM that eventually appears in the 0x00 bank. I think, then, we can either plan the copy a little better or plan the jump a little better.
If that doesn't pan out, I think I'd rather write a "thunk" or "jump pad" to RAM from the mapped ROM. The ROM writes that code to RAM, then jumps to that code ... which enters native mode, finishes necessary initialization, and then re-enters the ROM code at the newly mapped location. This way, very few bytes need to be copied and startup can continue expediently.
Anyway, thanks for talking it through -- now that I finally understand that the program bank register is honoured in emulation mode, I've got a much better picture. I like your bank/select swapping idea, and I'm sure I'll implement something like it.
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