Dr Jefyll wrote:
At some point the programmer may choose to alter PRB and/or DBR, but it'll be at his/her convenience
I'm looking at the decoder and clock manager at the bottom left of Chromatix's schematic.
It's not too clear to me what the 573 latch is doing becaues the latch inputs and outputs aren't labelled. The description says that the emulation line "swaps A15 with A21. so ROM mapped at $200000 in native mode appears at $008000 in emulation mode (ie, out of reset)"
From that, I'm inferring that the inputs to the 573 are the data lines, and are latching the the D lines when they carry A16..A23 during the low phase-zero clock. (Right?)
When I look at that book, page 61 has info about switching from emulated mode to native mode. The data sheet says that the PBR is initialized to 0 at reset.
And we reset. We know what we're doing, so we've got some ROM at 0x8000 and the reset vector points into it, and here we go.
First thing we do is try to switch into native mode. We clear the carry, CLC, then shove that into the emluated flags rack with XCE. Emulation bit is set:
Code:
; booted in emulation mode
; vectored here at reset
8000: CLC ; clear carry
8001: XCE
; now in native mode
8002: JSL HelloWorld ; print hello world!
So this is what I don't get. After XCE at 0x8001 is executed, the emulation line will go high. The lower-left schematic will move the ROM, with this code (including the JSL instruction we're about to execute) from 0x8000 to 0x200000.
PBR is zero, so the PC just widened from 0x8002 ot 0x008002. But the ROM isn't mapped there anymore.
What happens now? More likely, what am I mising? Is there a way to set the PBR to 0x20 before switching?
Maybe the trick is in section 7.8.2, which says PHB and PLB are available in emulation mode, even though emulation mode forces the bank address to 0x00. Does the code above to accommodate switching while the ROM mapping decoder moves the ROM address then become:
Code:
; booted in emulation mode
; vectored here at reset
8000: LDA 0x20 ; bank 0x20 for ROM is steup in PBR
8002: PHA
8003: PLB
8004: CLC ; clear carry
8005: XCE
; now in native mode
; remapped to bank 0x208006
8006: JSL HelloWorld ; print hello world!
Is that it?