There is no "intended source". There's only the real, original, source, and you keep the gate positive with respect to that one.

Does the substrate play a role in this? A MOSFET is a four-terminal device (even though the source and substrate typically get connected internally, yielding three external terminals). This is something I'd like to understand better, but I've had no luck finding additional detail. All the material I've seen so far assumes source and substrate are connected.

Again and again I've read that the resistance of the channel region between source and drain varies according to the voltage on the gate. I'll be grateful if anyone can direct me to a reference that answers the following. When source and substrate are not connected, is it the gate-to-substrate voltage that matters or the gate-to-source voltage? Or is the situation more complex, with both of those -- and the gate-to-drain voltage -- affecting, to some degree, the channel resistance?

Apologies if this is OT. I don't know how pertinent it is to the thread.

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

The substrate is usually the drain. The ones I worked with were like this:



Note the N+ and N- layers in the drain, whereas the source only has N+.

The following is from a page in the International Rectifier data book for the IRFZ24 MOSFET I used in the power supply of one of our products:



Note again that the substrate is the drain. The source is the dark cross-hatch area.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

I think the MOSFET Alarm Siren is using probably has this configuration. Image source: wikipedia. Their article notes that "the body (or substrate) of the MOSFET is often connected to the source terminal, making it a three-terminal device [...]".

Edit: RF types may connect the substrate to the drain; I'm not saying they don't.

Glancing over what follows, I don't recall there being so much detail. Perhaps the answer I seek is there. But I need another coffee before wading in!

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Substrate is connected to source. If you connect it to the drain, the body diode is reversed, and would always conduct.

Seem I started a bit of an argument here, though I'm certainly learning a lot about MOSFETs watching! I decided to proceed with the MOSFET protection circuit as-is, as Garth appears to be in the minority in this case. If it doesn't work, I can just remove the mosfet and bridge the connection with a nice blob of solder.

Anyway, I've been busy beavering away on this project, and I present to you the completed layout. Took all weekend, entirely by hand.

All the images are SVG this time, so you can (at least in theory) infinitely zoom with no loss of quality. I have also uploaded both colour and greyscale versions.

I was unable to upload directly to the board as SVG images are apparently not permitted. I've dumped them on my dumping-domain instead.

Revision 7 Schematic, Colour
Revision 7 Schematic, Greyscale
Revision 7A PCB Layout, Colour
Revision 7A PCB Layout, Greyscale

Note that the PCB is a four layer boad, and the upload does not show the two internal layers. There's really nothing special on them, just a giant power and ground copper pours.

_________________
Want to design a PCB for your project? I strongly recommend KiCad. Its free, its multiplatform, and its easy to learn!
Also, I maintain KiCad libraries of Retro Computing and Arduino components you might find useful.

I recommend putting some mounting holes in the corners, and screw in some standoffs. That way it's safely above any kind of metal on your bench.

Alsi, sorry to bring this up again:

The W65C02 datasheet specifies all the bus timing relative to PHI0,
delay from PHI0 to PHI2 isn't specified,
so using the PHI2 output of the CPU might bring you into trouble.
...Please check.

See here.

Layout looks nice for a start, feels like this is going to be a 4 layer PCB.
Standoffs are a nice idea, I always used "customized" GND vias as mounting holes in my PCB layouts.

Its got M2 mounting holes, in the four corners, they just don't show up on that particular rendering. Kicad has many quirks.

As to PHIx, I did hear what you said before about it, but I was always under the impression that the delay was in the order of 1-2ns, certainly nowhere near 22ns. For the FPGA recreation it wouldn't be an issue, I can easily buffer PHI1/2 out from 0 in negligable time, but as you say it looks like it'll cause real problems with the actual W65C02 part. I have updated the schematic, will do the change to the layout tonight. It's a fairly minor change - it only goes to the WE/RE gates and the VIA.

Is it still safe to use PHI1 for my single-stepper? even if I do the negation myself externally, there's always going to be some delay associated with it. Basically, RDY will update on the PHI1 rising edge. My reading of the datasheet says RDY has to be stable a minimum of 60ns before PHI0 positive edge at 2MHz. If PHI1 is the inversion of PHI0 with a +22ns delay, theoretically that gives me 168ns of spare time. I very much doubt that PHI1 would be that far off the mark.

_________________
Want to design a PCB for your project? I strongly recommend KiCad. Its free, its multiplatform, and its easy to learn!
Also, I maintain KiCad libraries of Retro Computing and Arduino components you might find useful.

At 1..2MHz, I think it is.


Hmm... those 7474 flipflops for generating PHI0 seem to have an inverted and a non_inverted output.

*facedesk* So obvious, too.

_________________
Want to design a PCB for your project? I strongly recommend KiCad. Its free, its multiplatform, and its easy to learn!
Also, I maintain KiCad libraries of Retro Computing and Arduino components you might find useful.

All fixed:

Revision 8 Schematic, Colour
Revision 8 Schematic, Greyscale
Revision 8A PCB Layout, Colour
Revision 8A PCB Layout, Greyscale

_________________
Want to design a PCB for your project? I strongly recommend KiCad. Its free, its multiplatform, and its easy to learn!
Also, I maintain KiCad libraries of Retro Computing and Arduino components you might find useful.

The PCB has been sent off to be fabricated.

Every digit I have, and several more I have just willed into existence, are crossed. This board has to work because there's no way I'll convince the University to pay for a second version if it doesn't: I've already spent double my budget.

Now, whilst I wait, I guess I should work on one of the other bits - keypad, software, eeprom burner or the VHDL. Anyone got any recommendations for Assembler/Compiler?

_________________
Want to design a PCB for your project? I strongly recommend KiCad. Its free, its multiplatform, and its easy to learn!
Also, I maintain KiCad libraries of Retro Computing and Arduino components you might find useful.

I just noticed this was a University of Kent project. That was my uni (UKC 1990). Nice to see humanities and social sciences didn't entirely take over the place. Good luck!

Hi, I thought you guys and gals would like to see the fruit of all that labour. So, without further ado:

_________________
Want to design a PCB for your project? I strongly recommend KiCad. Its free, its multiplatform, and its easy to learn!
Also, I maintain KiCad libraries of Retro Computing and Arduino components you might find useful.