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PostPosted: Sat Apr 24, 2021 4:39 am 
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Joined: Sat Sep 29, 2012 10:15 pm
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If IO consists of a fast bitbanged SPI ouput using Dr. Jeffyl's magic opcodes, and an SPI input via the SO pin, no I/O mapping is required . We can overlap 64K . RAM and 64 K ROM. A flip flop holding the mode bit tri -states RAM output while enabling ROM and slow clock.

If the resultant system can sustain 30MHz, bit-banging SPI IO should not be a bottleneck...

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