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PostPosted: Thu Jun 03, 2021 10:34 am 
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Joined: Sat Aug 09, 2014 4:14 pm
Posts: 4
brain wrote:
Beamracer implements a dual port functionality in the CPLD/FPGA, just like I described initially.

I am wondering what you meant with the above? BeamRacer block diagram shows what is implemented and I am not sure how to match it with what you wrote.


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