Hi Jac (and gang),

I appreciate the insights, as always. I admit I've been brain-storming ways to make the board easily configurable as either a Junior or a KIM-1 but the KIM-1 configuration would need an additional chip and there's the problem of the inverted segment lines on the displays. I suspect a KIM-1 configuration may have more appeal so I'm leaning towards implementing the KIM-1 display design. While I'm interested in building a Junior now, ultimately I'd like to come up with a KIM-1 system design and PCB, possibly a kit, that I could sell for a reasonable price. I don't want to make a lot of money. I'd just like to be able to pay back a couple generous mentors who have helped me out these last couple years.

If you're interested... I updated my PIC firmware. I can now map a "PIC I/O" page into 65C02 memory space that provides the 65C02 with full speed (1-MHz) direct access to all two hundred thirty PIC SFRs (special function registers). Of those, I'm really only interested in using the registers that support the serial port and the high speed SPI interface. Of course this means trading three of the six "chip select" pins for SPI pins but I think it's probably worth it in order to provide the 65C02 with access to an SD card and other devices through a (practically "no cost") high-speed SPI interface. The PIC uses one "chip select" for RAM to support the "loader" function which leaves two "chip select" pins for expansion. While that may not sound like alot, please note that a single chip select pin mapped to one or two pages in address space could be used to select four or eight 65xx devices, respectively, without additional chips, or, you could also expand the number of chip selects using a 74x138 decoder.

I'm also thinking about designing another somewhat more generic or general purpose board. That is, I'm thinking about using pairs of 40-pin sockets offset by 0.1-inch to allow installing a pair of 6532s, or a pair of 65C22s, or a combination of both. I'm also working on a 20-pin chip for 40x25 composite NTSC video output. With "soft decoder" and "loader" functions in the PIC, it's relatively easy to download a new 256-byte memory map file and a new ROM image file into the PIC to change the boards personality. That is, you could mimic an Apple-1 with 64K, a front panel, and lots of expansion capability built-in, or mimic a 64K SBC-2 v2.5 + SBC-2 OS with a front panel and video, or many other configurations (using six chips + two for the front panel). Moving the SBC-2 I/O from page $7F to somewhere higher in memory to provide more contiguous RAM space is easily accomplished with a new memory map file and ROM image file. Lots of fun and exciting possibilities... For example, wouldn't it be fun writing code for a 6532 (I/O + 128 bytes RAM) mapped into zero page?

More later... Cheerful regards, Mike