I launched my Chips4Makers project now @ ORConf 2017 (slides).

The target is to launch a micro-controller(s) based 3 retro cores; the MOS6502 is one of them. A micro-controller it will include on-chip memory and the pins on the chip will be I/O pins.
The project is on hackaday.io and a pre-launch site for the crowdsupply campaign is also ready. For more detailed progress of the project it is best to follow one of these sites.

This is a pilot project; ultimate target it to make it possible for makers/hobbyists to design and manufacture their own custom chips by crowdfunding.

Hope some of the people here may be interested.

Very exciting - I've signed up for your newsletter.

How is an ASIC different from any other chip? How is an ASIC different from a 6502 for example beyond perhaps being a chip designed by a customer and not WDC?

An ASIC is a chip. This ASIC is different as the full source code is available and the final target is that people can make their own chips combining a CPU with other custom designed blocks. I agree that if you are not so into open source this project is not so sexy compared to a WDC as the latter one will likely be cheaper.

Another difference is that my chip is a microcontroller and plan is to make a board with Arduino compatible layout so you should be able to access Arduino shields with 6502 asm.

It sounds like you might be confusing an ASIC with programmable logic like an FPGA. Wikipedia explains it well:

An application-specific integrated circuit (ASIC) /ˈeɪsɪk/, is an integrated circuit (IC) customized for a particular use, rather than intended for general-purpose use. For example, a chip designed to run in a digital voice recorder or a high-efficiency Bitcoin miner is an ASIC.

<snip>

Field-programmable gate arrays (FPGA) are the modern-day technology for building a breadboard or prototype from standard parts; programmable logic blocks and programmable interconnects allow the same FPGA to be used in many different applications. For smaller designs or lower production volumes, FPGAs may be more cost effective than an ASIC design even in production. The non-recurring engineering (NRE) cost of an ASIC can run into the millions of dollars.

Regardless, it's great that making one's own microprocessors and microcontrollers has come within the reach of hobbyists.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

I'm certain this thread is about ASICs not about FPGAs!

The economics of the two are different. It's not unlike a ROM vs an EEPROM. Lead times and price vs volume will be different accordingly. It would be interesting to know if we should expect a performance advantage.

That's a very good analogy.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Me too!
FYI, I work for a company that provides ASIC manufacturing services...
This project is a personal project though as our company is mainly B2B focused. I want to show that cost of the mature nodes should make ASICs reachable for crowdfunded projects.

Yea, I just wanted to confirm that an ASIC is no different from any other IC, save perhaps who designed it.

I recall Back In The Day, the early Mac II computers had "custom ASICs" which basically handled most of the discrete logic that's involved in a typical consumer computer vs an IBM PC.

And that simply meant that Apple designed the chip, and the found someone to make it to their specifications rather than Intel deciding "Hey, the market could sure use a chip that does XXX" and created it in house. So, whatever process is used internally by the IC manufacturers is also used to create an ASIC, but an ASIC tends to be more specialized for specific purposes, as well as limited distribution.

Apple, of course, now creates many of the chips (including the processors) used in their devices. I don't know if you consider the A11 (new CPU chip for the new iPhones) an ASIC or not.

And the advantage of an ASIC over a FPGA is, what, both density and overall speed/power performance?

My chip will have 5V I/O, modern FPGAs stop at 3.3V but for the rest it's a matter of preference (see slide 7). Real man use real chips...

Well, how fast can an FPGA 6502 go? How fast can a FPGA 68000 go? Are they the same? What determines that? What about your ASICs, how fast will they go? What about power and heat?

I think it's neat you're trying this, but let's say after a few projects are done, much of the startup is done and amortized, how much do you think it would cost to do, say, the equivalent of the W65C265S? What would be the chip minimum and the cost per chip?

Truly, for me, beyond the explosion of the SoC market and the fascinating combinations that are popping up (like the Xilinx ZYNQ (?)), the most interesting piece of hardware to me in recent times was the Oberon Workstation running on its own CPU with it's own instruction set coded up in an FPGA. Open source from the VHDL to the OS and tool set, and practically self hosting as well. Just remarkable.

I'd be interested to see some performance estimates.

A look at the various flavours of 6502, from the reduced pincoont of the VCS, the ones with on chip Forth (or Basic?) or with a few bits of I/O or with on chip banking or on chip LCD and keypad controllers will illustrate that a little customisation can go a long way.

But you need volumes in the hundreds or more to make it worthwhile I would think - unless performance is much higher than FPGA and worth the price in low quantities, which for a few cases it might be.

As ever, if you're not in the target market for a project idea like this ASIC idea, it can be a leap to understand the value proposition. Don't suppose that there's little or no value, when there's a possibility you haven't yet seen it.

Now that's an interesting project.


Maybe it's a bit too early to ask that sort of questions, but:


How much memory we are talking about ?

Since all of those three cores have their pros and cons:
Would it be possible to have all three retro cores up and running, or just only one core at a time ?

Would there be a mechanism for booting the cores from an external SPI EEPROM ?

Since page 10 of the slide "mentions" robotics, what peripherals are going to be in this microcontroller ?

BTW: please don't underestimate the effort required for having "nearly bug free" peripherals in a microcontroller.
One could, of course, just try to add sort of an 8031 core or such (which probably has some peripherals "included")...

"Customers" nowaday probably would insist to have Microcontrollers with USB and Ethernet connectivity integrated.

...Would be nice if the package of the chip won't be too impractical to solder for hobbyists.

It strikes me there are two projects here- the capability to do ASICs at reasonable cost in modest volume with open source tools, and the particular first ASIC which demonstrates a particular retro microcontroller as a proof of concept. The microcontroller needs to show the capability and the economics. Maybe to recoup costs it's worth making it attractive to use too.

When spending some more thoughts on this:

What really would be cool would be having sort of "a small FPGA area" (nothing fancy) on the chip,
tied to some registers, up\down counters and comparators (ALUs would give more flexibility, of course).

This way, the "end users" could implement just the set of peripherals they really are going to need,
as there is a difference between building a CNC controller and a video game when it comes to peripherals.

Hmm... of course, programmable logic on the chip could work as glue logic for the CPU cores, too.

Edit: dug out the PSD8XX datasheet. Please take a look at the block diagram on page 52.