It seems a good simplification to me. Are the pages of physical memory each tied to specific regions of the address space, or can the same page be paged into any of the four address space regions that you choose at runtime?

No, for simplicity, each block on a page can only be mapped into the same block. Probably wastes half the memory, but hey. It means you could do a complete context switch - stack and ZP and all without too much effort, but that's not an immediate plan.

So you write the page you want to see in block 0-3 into the 670 register, and there it is - the register just provides the top four bits of memory based on what A14 and A15 are doing.

Neil

I would think you could map any 16K block into any 16K region ???

wait so if i understand you right, your current design works like this:
-you take the CPU's A14-15 (upper 2 address bits) and use them to select 1 out of 4 registers out of the 670
-the selected register then outputs it's contents as A14-17 which then combine with the CPU's A0-13 (lower 14 address bits) to go to Physical Memory (a single 256k RAM chip for example).

if that's correct then it does allow different blocks to point to the same physical memory by just making multiple of the 670's registers contain the same value.

if you don't want this you have to also connect the CPU's A14-15 to physical Memory along side the 4 lines from the 670, which would also require 1MB of Memory connected so that all blocks map to some part of RAM. (which could be easily done with 512kB ROM/FLASH (SST39SF040) and 512kB SRAM (AS6C4008) for example)

Yes, A14 and A15 go to the same lines on the memory; the 670 output goes to A16-A19 on the ram (or as many as I decide to use, but a 1M part is handy).

Think of it as one of those kids books where you get a hat and face from one page and the shoulders from another and the hips from a third and the legs and feet from a fourth... hours of endless fun if you're three. You can't have two hats or four legs, just a different hat. There is no attempt to make a unified and totally flexible memory space.

Neil