I was reading this page where people were talking about PLA lines:

https://www.pagetable.com/?p=39

What does PLA stand for?

I believe in this context it means Programmable Logic Array, which might be a bit of a misnomer, since it's not programmable in any practical sense.

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Got a kilobyte lying fallow in your 65xx's memory map? Sprinkle some VTL02C on it and see how it grows on you!

Mike B. (about me) (learning how to github)

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

I would have said programmable logic array - and I see that's the term used in Mead & Conway, which is surely definitive!

The interesting point about that, is that it's programmable in the sense that the locations of transistors are regular and all the other aspects of layout are constant, regardless of the logic function. It can be laid out geometrically just once, at an early stage of design, and then the logic function is committed when the transistors are adjusted to be present or absent at each location, which can happen quite late in chip development.

That is, it is not user programmable, nor is it field programmable, but programmed before fabrication at the time of finalising the mask layout.

Usually a PLA is a two-plane construction, with an AND and an OR plane (both typically made of NOR gates for good reasons) and yet the "PLA" found in the 6800, 6502, and 6809 is only a single plane. That single plane cannot express arbitrary logic functions, and so it is accompanied by the so-called "random logic" - again, mostly NOR gates, although there's variation there, and the layout is very much unstructured.

As such, late adjustments to the 6502 instruction set, or fixes to bugs, might be implemented very easily by adding or dropping transistors in the logic array, or might be implemented with more difficulty by more difficult changes in the rest of the chip.

ROMs come in similar flavours: a mask ROM is fixed by adjusting the masks before manufacture, a PROM can be programmed after purchase, an EEPROM can often even be programmed in circuit, in the field.

Programmable Logic Array: https://www.computerhistory.org/siliconengine/pal-user-programmable-logic-devices-introduced/

I had always assumed that PALs came first, and the more flexible PLA later, but it looks like it was the other way around. The PAL was a simplification of the PLA, which allowed it to be faster and cheaper.

I don't know what you mean by "it's not programmable in any practical sense". Being programmable is their whole reason for existing. 'Program' as a noun is more usually a sequence of instructions, but as a verb it has developed a more general meaning. The configuration that you put into a PLA wouldn't be described as a program, and the act of creating that configuration isn't programming. But putting the configuration into the chip is, and has been for a long time.

Yeah, I probably shouldn't critique word choices, since I get so easily annoyed when others do the same. I meant "not programmable" in the specific case of the 6502's "PLA", which has the configuration "baked-in" more or less permanently. I wasn't trying to generalize, but I can see how it may have seemed that way.

_________________
Got a kilobyte lying fallow in your 65xx's memory map? Sprinkle some VTL02C on it and see how it grows on you!

Mike B. (about me) (learning how to github)

Ah, yes! That makes a lot more sense. I thought you were talking about the discrete chips. But who uses those these days? It's all GALs or CPLDs or FPGAs.

The 6502's is a bit of a stretch. It's called a PLA, although I believe (without bothering to check) it's structured more like a PAL. It still has the possibility of separating its design from its programming - the rows and columns are all layed out, and the configuration can be changed by placing contacts in the right spots. That's pushing it though. I think it gets the name through a chain of resemblances leading back to something that is genuinely programmable.

On the question of the innards of the 6502, I notice that Donald Hanson's (famous) block diagram calls this structure "Decode ROM". It's not a ROM in the usual sense, as it doesn't have fully decoded addresses.

I wonder if "PLA" is a term used by more recent analysis by reverse-engineers, and that it wouldn't have been the term used by the 6502 designers. I wonder if it might even be a term introduced by Mead & Conway - surely a term popularised by them.

I notice that Bill Mensch's topography patent for the 'C02 speaks of "instruction decoding circuitry", "minterms" and "read only memory circuit".

As for PALs and GALs, it seems most likely to me that such structured layouts would first have been invented and used within complex chips and later offered as the core of standalone parts. As I say, the 6800 uses structured layout in this way, and shipped in 1974. (And see also 1971.)