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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Doing a PCB printout on paper, 'fitting' actual components on it, then checking for any physical problems, is a procedure that comes highly recommended. It can also help to smooth out the layout a bit more ('I can move that a little bit more that way'). The PCB design itself, as I always say to myself : "check, double-check, triple-check, quadruple-check". Same thing for the related schematic (if that's not okay, your PCB won't be either !).

And then still mistakes slip by occasionally. Which can be very disheartening after you unpack your PCBs. But when everything is hunky dory, it is all the more satisfying ...

working in an electronics company I have seen things only god knows what happened there....

one client specified a schematic and the exact BOM, we made the PCBs accordingly to the BOM and schematic, ordered a prototype and found out they specified smaller parts than they were intended to use. I'm talking about specifying QFP packs when they wanted to use PLCCs....

but since the pcb was quite elaborate and hat to be made with REALLY special requirements (also it was 8 layers...) single run costs were close to 5 figures.. so... it was actually cheaper to dissolve the package in acid, glue the die to the board and bond it directly onto the footprint...

all I know was that we were issued a redesign with the correct footprints and that version went into production, but I quit during the redesign process so I don't know if it ever got finished... an ex colleague said the client cancelled the job the day before sending the files, but I googled the product later and it was available...


but yeah: always make a real-size printout and test all the footprints. saved my butt a lot of times

So I realized that I can try to use the place where the ROM socket was going to be to connect to the address bus (minus the top bit), and the data bus; basically, all but a small handful of the required signals are available via through-holes. So, I'm going to attempt to rig something to hook the board up to an external 'C02 and ROM, and see if I can get it running. Wish me luck!

On my TIM-1 board I added an expansion slot connector, which I've never used, but it turned out to be really useful for debugging. I slid an unmounted socket over the slot and then had convenient pins for for inspecting the entire bus.

My worst mistake was the first board I made, a long time ago. The microcontroller came in a PLCC package, which was quite new back then. My design software didn't have a PLCC footprint so I made it myself, but I got the pin ordering wrong on two sides. It was recoverable with quite a bit of cutting and patching, but was a good lesson in checking everything. Looking at the Datasheet now makes me feel a little better. The pinout of the PLCC doesn't show how the pins are ordered on the socket.

I've got another board that I designed with a surface mount PLCC socket, but I can't hand solder that on, so I'm a bit stuck with that one, apart from buying a reflow oven. Cheaper to redo the board I guess. And I'm learning the value of having through-hole pins as test points, or if needed, patch points.

The thread BDD recommends is excellent, though now very long. What really helped for me was the intuitition about signal return paths I got from the video and diagrams I link in this post on that thread. To summarize, an AC signal (at kHz frequencies and above) travels not on the trace, but in the field between that trace and ground. Thus a ground plane helps because it keeps the return path very close to the signal path, but this could could be equally well done by simply having a second trace for the return path directly underneath or above the signal path. A ground fill may or may not act in the same way for any particular signal path, depending on whether it's continuously adjacent with the signal path (as demonstrated in the pictures).

I don't understand the parasitic capacitance issue that BDD describes, but I've added a post to the end of that high-speed design thread asking about this.

Good luck with your next spin of the board, by the way. If it's any comfort, this thread was helpful to me, and may save me some trouble as I get into PCB design. Doing a physical check of the PCB layout against a paper printout is definitely a great idea that I'd not thought of.

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Curt J. Sampson - github.com/0cjs

I've only gotten to spend a relatively small bit of time reading through that thread; definitely deserves more hours. I have always used ground pours on top and bottom, but quite honestly, it's almost entirely for aesthetic reasons. If the difference between pours and no pours is small enough, which I'm sure would vary wildly from one board to another, then I think it's acceptable personally. Though I would be interested in directly comparing the same board with and without them.

In the case of this board, I have four layers: signal, power, ground, and signal. The inner layers are 'cut up' a fair bit by vias and the odd through hole, but generally, it's still a _mostly_ continuous plane. I guess I'd hope that this would mitigate any harm the pours might be causing. To be fair though, my last board, a 2-layer THT board, works (mostly) just fine with pours so *shrugs*

Thanks for the well wishes and I'm glad someone got something out of my mistake! Goes to show the carpenters were right about measuring twice and such

I am unsure from this response that I clearly communicated my thoughts on this in my post above, so let me try to be more explicit. Looking at the pictures I linked is likely to be helpful with this.

From the point of view of signal returns, the ground path being a plane is of no importance at all. The key desire is that the return path exactly follows the source path. When laying out a board, a continuous plane happens to be a (much) easier way to achieve this than creating an individual ground return trace underneath each signal trace, but the effect is the same either way, since with a fully continuous ground plane the return path will always follow the source path as closely as it can.

Whether through-holes and vias have any effect on this depends on their location and what they interrupt. If you have a huge hole cut out in the centre of the board, that's absolutely fine, since no traces are crossing it on any layers. On the other hand, a single narrow trace cutting across the ground plane with signal traces crossing it (as in the second image in my link above) can result in a significantly different return path, which will degrade signal integrity.

(As usual, this just reflects my current non-expert understanding of this, based on what research curiosity has prompted me to pursue. Corrections from those more knowledgable are always welcome.)

There are other considerations with boards with more than two layers, such as the bypass capacitance one can gain by placing ground and power planes adjacent and close. I've not delved into this much, and it gets complex quickly (e.g., I think that layers 2 and 3 are much further apart than 1 and 2 or 3 and 4, greatly reducing that bypass capacitance, and at least one authority I've read says that the ground and power planes are generally better on the outside layers rather than the inside ones), so I'm not really bringing that in here.


Yeah, as a hobbyist this is why I don't get too hung up on this kind of stuff. Just because signal integrity is heavily degraded doesn't mean the thing won't actually work, particularly at the lowish speeds we hobbyists use. My research and reading on this is really more due to personal interest than trying to resolve actual problems I've encountered.


As with the ground plane vs. ground traces thing above, it might be utterly unrelated and irrelevant. The key here, too, would be understanding what various separate things the ground plane is achieving, rather than just leaving it "ground plane good" without understanding why (and when it isn't good).

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Curt J. Sampson - github.com/0cjs