1024MAK wrote:
There is a design for a 6502 card, and a 6522 card for the RC2014 system. But I think this is done with some 6502 system signals on some of the spare bus lines.
Well, I don't know why I didn't follow up on this earlier, but when
drogon just now mentioned that there was a 6502 card design for the RC2014 bus, I did a web search and it popped right up!
A few posts on the Ancient Computing blog describe a system designed to use a 6502 board with the RC2014 peripheral boards.
On the CPU board he does the obvious thing to generate /RD and /WR and qualifies them with φ2, and he decodes addresses to assert /IO when a certain 256 byte range is accessed and /MREQ otherwise. He also inverts A15 to flip the RC2014 standard ROM and RAM locations, presumably because the ROM and RAM boards are doing their own address decoding for select. (He also mentions later that he brought out the original 6502 R/WB signal to a spare pin on the bus for use with 6502 peripherals on other cards, which is perhaps what you're remembering.)
In this post he discusses dealing with a few peripheral boards. The RAM is trivial (just remember to disable the
bottom half of a 64K board because of the A15 flip), but the 32K ROM, because it's actually giving you 4 8K pages, is a bit tricker because you need to move the 8K page from the bottom of the address space to the top. Still, it's nothing unobvious, just a little tweak to the decoding. The ACIA board, since it already uses a 6850, is basically undoing the stuff that was done to make it compatible with the Z80, I think. (I've not looked too closely into that yet.)
He's also done
a 6809 board.