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 Post subject: VIA protection
PostPosted: Fri Mar 31, 2017 1:17 pm 
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Hi guys

With my most recent project PCB layout I am running low on PCB real estate and so have decided to route the audio and keyboard off on to daughter boards.
These boards will plug into IDC sockets on the main board which in turn connect to a 65C22 VIA ports A & B.

My question: My limited knowledge of electronics tells me that it's a good idea to put current limiting resistors inline on the port pins of the VIA so that there is a certain amount of protection from issues from faults in the daughter boards. Are there any down sides to doing this? From what the datasheet says there is no current limiting on the pins in the W65C22S (unlike the older NMOS version)
Also, if using resistors is desirable, what limit per pin should I use? The DC characteristics seems to say that it 100ma over-all is tollerated, so is this a case of 100/20 = 5mA per pin max?

If this is the case then how do I calculate the resistor needed given that I don't know the precise load (yet) that will be on the pins? Just go with 1K resistor (5v/0.005A)?

Or should I maybe use socketed octal buffers such as the 75HC244?


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 Post subject: Re: VIA protection
PostPosted: Fri Mar 31, 2017 4:16 pm 
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There's no point in crippling the VIA's outputs. I've run them for 30 years without such "protection" and the only time there has been a problem was when there was latch-up from a spike in the power on the printer which was connected to it across the room which was on a different mains circuit. The VIA got hot, but was fine, undamaged, after turning the power off and back on. The latch-up was not from excessive I/O current in the normal way, but pulling one or more pins too far above Vcc or below ground for an instant.

The W65C22S VIA's outputs are stronger than the 74HC244 anyway, able to pull within 0.8V of either rail with a 220-ohm resistor to the opposite rail, meaning a 19mA load, even pulling up, and give 50mA into a dead short. That's per pin, not the whole port (although I don't recommend leaving it shorted for an extended time). Another problem with the '244 is that you won't have control of the direction of individual lines. The '244 requires all eight lines to go one direction or the other, not split up. It also doesn't allow emulating an open-drain I/O like the VIA does.

Just go direct.

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 Post subject: Re: VIA protection
PostPosted: Fri Mar 31, 2017 9:21 pm 
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banedon wrote:
With my most recent project PCB layout I am running low on PCB real estate and so have decided to route the audio and keyboard off on to daughter boards. These boards will plug into IDC sockets on the main board which in turn connect to a 65C22 VIA ports A & B....my limited knowledge of electronics tells me that it's a good idea to put current limiting resistors inline on the port pins of the VIA so that there is a certain amount of protection from issues from faults in the daughter boards.
GARTHWILSON wrote:
I've run them for 30 years without such "protection" and the only time there has been a problem was when there was latch-up from a spike in the power on the printer which was connected to it across the room which was on a different mains circuit. The VIA got hot, but was fine, undamaged, after turning the power off and back on. The latch-up was not from excessive I/O current in the normal way, but pulling one or more pins too far above Vcc or below ground for an instant.

I concur with Garth. Your setup is highly unlikely to run into latch-up problems or other such maladies, simply because the hardware is in close proximity and is being fed from the same power source. Back when I played around with the Commodore 64 and 128, I attached a parallel port printer to the user port, which directly attached the I/O pins of the CIAs to the printer. Nothing ever malfunctioned, and that was through a hand-made 10 foot cable.

If you are truly paranoid you could attach Schottky suppression arrays to the VIA's I/O pins, which arrays would then try to clamp the voltages close to the VIA's safe operating range. However I really thing that is unnecessary.

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 Post subject: Re: VIA protection
PostPosted: Tue Apr 04, 2017 10:47 am 
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Thanks for you advice, guys. I'll skip the protections given what you've advised.
What brought this to mind is that, over the years, I've seen various reviews/documentaries/discussions regarding older 8 and 16 bit commercially produced computers which had edge connectors for peripherals which went straight on to the bus with no protections at all - ZX spectrum & Commodore Amiga to name just a few. This was known in the day to lead to killing a majority of bus attached ICs when peripherals were plugged in with the power on (i.e. accidentally). I know that this is not quite the same as direct bus attachment, but thought it worth asking the question.


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 Post subject: Re: VIA protection
PostPosted: Tue Apr 04, 2017 8:09 pm 
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Hot-plugging is a subject all its own. For things that are not designed for hot-plugging, all bets are off. The normal way to prevent problems in things that are designed for it is to make the connector such that power and ground get connected before the signal lines do when plugging in, and are the last to be disconnected when unplugging.

Today's CMOS logic always has internal protection diodes. To keep their capacitance low, they're pretty tiny, but they still prevent a lot of problems. I've had situations where power didn't make it to an IC and it was working anyway (although not as well as it should) because it was being powered up from the signal lines, through those diodes. Actually, I remember hand-held terminals 20+ years ago that had no batteries and were powered up entirely by signal lines on the RS-232 connection.

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 Post subject: Re: VIA protection
PostPosted: Tue Apr 04, 2017 8:40 pm 
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If you take a look into an USB plug you see different length contacts. That is what Garth mentioned.
Nevertheless even that is not bullproof. Charge injection ("ESD") could weak and (repeated) kill electronics. If you look how Ethernet works - everything is transformer isolated - than you know what efforts are neccessary to getting close to bulllproof.

At least I would suggest sockets for your VIAs.


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 Post subject: Re: VIA protection
PostPosted: Wed Apr 05, 2017 5:51 am 
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Well, if you are paranoid about ESD discharge, you could try to add something like a TVS protection diode array to the I\O ports,
maybe something like the SMS05T1G:

Attachment:
sms05t1g.png
sms05t1g.png [ 10.85 KiB | Viewed 1816 times ]


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 Post subject: Re: VIA protection
PostPosted: Wed Apr 05, 2017 6:50 am 
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The TVS diodes also come in 8 wide packages.


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 Post subject: Re: VIA protection
PostPosted: Wed Apr 05, 2017 3:54 pm 
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GARTHWILSON wrote:
The normal way to prevent problems in things that are designed for it is to make the connector such that power and ground get connected before the signal lines do when plugging in, and are the last to be disconnected when unplugging.


GaBuZoMeu wrote:
If you take a look into an USB plug you see different length contacts.


OK, now I'm checking all of my USB cables to see which are proper with the longer power rails and which ones are cheap garbage. LOL

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 Post subject: Re: VIA protection
PostPosted: Wed Apr 05, 2017 8:32 pm 
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I don't have a reference to hand, but I'm sure I read somewhere recently that the W65C22S VIA has built-in ESD protection anyway.

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 Post subject: Re: VIA protection
PostPosted: Wed Apr 05, 2017 10:18 pm 
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Alarm Siren wrote:
I don't have a reference to hand, but I'm sure I read somewhere recently that the W65C22S VIA has built-in ESD protection anyway.

It does, but that's not the same as using a Schottky array on the buses clamp voltage in the 5 volt range. It's been my experience that the internal ESD protection can only take a few "hits" before failure occurs.

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 Post subject: Re: VIA protection
PostPosted: Wed Apr 19, 2017 9:30 am 
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Spotted some TI Schottky diode arrays at Mouser, DIP and SMD package, but I'd say they are a little bit "exotic"...

And IMHO it would be a good idea to have a TVS protection diode between +5V and GND on the PCB when using such arrays,
just in case if an ESD discharge hits when the PCB isn't connected to a power supply.

SN74S1051: 12 Bit Schottky diode array, 16 pins
SN74S1053: 16 Bit Schottky diode array, 20 pins


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 Post subject: Re: VIA protection
PostPosted: Wed Apr 19, 2017 9:10 pm 
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Using extra Schottky diodes feed the ESD charge to +U or GND. A good placed 100nF capacitor (low ESR = ceramic, no leads = SMD (if possible)) would absorb the charge. (If you discharge 50pF into 100nF the voltage rise is 50p/100n = 1/2000 .) Of course ESD avoidance is always a good choice.


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 Post subject: Re: VIA protection
PostPosted: Wed Apr 19, 2017 9:20 pm 
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For performance reasons though, you would want to avoid loading any of the signal lines (including VIA I/O lines) with 100nF (.1uF).

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The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?


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 Post subject: Re: VIA protection
PostPosted: Wed Apr 19, 2017 10:54 pm 
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GARTHWILSON wrote:
For performance reasons though, you would want to avoid loading any of the signal lines (including VIA I/O lines) with 100nF (.1uF).


Ooooops - yes, I didn´t say it clearly: the capacitor is charged through the diodes. I.o.w. it's across +U and GND. And yes, there are bypass C's already, but ESD protection requires very short lines and no leads if possible.


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