Hi Garth,
It appears that we're both correct about the internal execution of 6502 instructions! The aspects of this where we seem to disagree is not because one is right on the other is wrong, we having just been talking about different implemenations.
For the WDC implementation then their programming manual is the gospel. My dribblings were based on my recollection of the single step execution details given in Appendix A of the old MOS Microcomputer Hardware Manual (available from
http://highgate.comm.sfu.ca/~rcini/clas ... y_docs.htm under "MOS Microcomputers Hardware Handbook - single archive 14.1MB). In that implementation there is no pre-fetching of instruction opcodes except for single byte instructions where the opcode of the next instruction is read during the second clock cycle but discarded. All other instructions are completed before the next opcode is read.
The Rockwell R6500 Programming Manual from the same site also gives a good write up on the extent of pipelining used in these early 6502's. Interestingly the programming manual seems to me to be identical to the old MOS one but with Rockwell covers - something which seems to be verified by the Rockwell R6500 Hardware Handbook - which IS the same damned book in different covers!
Interesting stuff.