floobydust wrote:
...WDC did send me some other chips to test.... none had the xmit bit stuck on, but all had other quirks which were mostly related to high noise levels and had limits on what I could manage with them. As a result, none of these could be used as direct replacements for existing NMOS chips as noted.
Noise levels? Can you describe what's going on?
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As for causing some grief in Mesa... well, not really my fault.
I was kidding about causing some grief. The fault is in the product, of course.
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Also, WDC has not updated the datasheet with errata showing the xmit bit problem...
I suppose they figure that they will fix the problem, so why edit the data sheet. I see this problem as more than errata, as it significantly complicates the use of the device in its intended application.
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...and the SCC2691 per the datasheet will have an upper limit of 6MHz, but I'm hoping 8MHz or more will be possible.
Shoulda went with the 26C92.
That, I know, works at 15 MHz.
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I also am working on getting a SCC2691 chip setup, but due to real work and a ton of travel, I've just not had the time to finish up the initial hardware yet. And yes, the datasheet is a bit cryptic and vague, so it will likely take me some time to get it working once I have the initial hardware done.
Any questions please ask. I've extensively studied the 2692 and 26C92, and know the quirks and programming tricks.
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