I've made a little arduino setup to teach myself about the 6522 shift register. I want to use it to shift in a key from a keyboard device, generating an interrupt once the key is available. I've been using the "shift in under external CB1 clock control". Things seem to work if I set my bit value on CB2, set CB1 high, and then either delay() about two phi2 clock periods or explicitly watch for a sequence of low/high/low/high on PHI2 before clearing CB1 again. But what's the minimum I need to do?

The datasheet says "Note that data is shifted during the first PHI2 clock cycle following the positive going edge of the CB1 shift pulse. For this reason, data must be held stable during the first full cycle following CB1 going high."

But what does that "...first full cycle..." actually mean? rising edge to rising edge on phi2? The timing diagram doesn't seem very explicit.

I guess I also need to watch out for the shift bug here? It didn't look like the other modes supported an externally initiated shift with an interrupt on completion, unless I'm misreading?

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Another option is to have the Arduino pull CB2 low (for example) to initiate an operation, and have your code pick up an interrupt from that and initiate a shift input operation with the 6522 generating the clock signal on CB1 - then use that to drive the Arduino's shifting. It is two interrupts per byte rather than one, but it is still interrupt-driven so might suit your goals.

The shift register bug is happening exactly in the shift in under cb1 clock control that you are using.

However, what you quote looks like from the WDC65C22 datasheet. Which, as I understand, has the bug fixed. So, to make sure you don't get hurt, you have to use the WDC device.

Regarding the timing. The bit is shifted in at the next phi2 falling edge. I believe the diagram at page 49 of the wdc datasheet clarifies this: https://eater.net/datasheets/w65c22.pdf (tSR3)
At least that is how I read it.

I am not sure if any complicated logic is needed if the SR CB1 in clock is just slow enough.

Hope that helps
André

Edit: I just read that WDC may not have fixed the bug. Which would be an absolute bummer! http://wilsonminesco.com/6502primer/IO_ICs.html

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Author of the GeckOS multitasking operating system, the usb65 stack, designer of the Micro-PET and many more 6502 content: http://6502.org/users/andre/

thanks, all this is very helpful!

I hadn't digested that diagram on p49, but I agree that's what it looks like.

Am I correct that Garth's flip-flop fix is basically ensuring that the CB1 transition is always delayed to just after a rising phi2 edge, to keep it from coinciding with a falling edge? I should be able to mimic the same thing from my rp2040 keyboard by waiting for a rising edge before setting CB1. then counting one or two falling edges before unsetting it again.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?