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PostPosted: Thu Nov 09, 2023 6:54 pm 
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For devices for which only min and max propagation delays are specified, one might safely -- or optimistically -- assume that best case typical could be somewhere in the middle of that range. But what about devices that only specify maximum? In RAMs, for example, how likely is it that (as long as layout and construction isn't overly sloppy,) tACC or other parameters could be less than the max value stated?

I wouldn't suggest that such an assumption would be valid for every device in every circumstance, but as one example of performance exceeding datasheet specs, we've seen that the 65C02 can be clocked faster than what WDC specifies.

How much Truthiness, one way or the other, can we count on?

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PostPosted: Thu Nov 09, 2023 7:30 pm 
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The post at viewtopic.php?p=58784#p58784, and following posts, should answer that.

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PostPosted: Thu Nov 09, 2023 8:53 pm 
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richardc64 wrote:
For devices for which only min and max propagation delays are specified, one might safely -- or optimistically -- assume that best case typical could be somewhere in the middle of that range. But what about devices that only specify maximum? In RAMs, for example, how likely is it that (as long as layout and construction isn't overly sloppy,) tACC or other parameters could be less than the max value stated?

I wouldn't suggest that such an assumption would be valid for every device in every circumstance, but as one example of performance exceeding datasheet specs, we've seen that the 65C02 can be clocked faster than what WDC specifies. ...


Also, note that the W65C02 and W65C816 chips are a particular case of the chips now being produced with a process that is faster than the process of the chips that the specification testing was done for. It seems like it's just not worth it to WDC to redo the testing.

But from an account that I read of the days that CMD was producing the SuperCPU accelerator for the Commodore 64 by W65C816-14 chips at 20MHz, they were testing every single chip they bought and discarding a large number of them as unsuitable. So if 99% of the chips produced with the original process were good for 14MHz, perhaps only 50%-60% were good for 20MHz ... and even with that testing, the SuperCPU accelerators had a reputation back in the day for being temperamental (which as the thread Garth linked to discusses, is sometimes a temperature issue itself).

With the process they are making them with now, it seems likely a lot more would have passed that testing.


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PostPosted: Mon Nov 13, 2023 10:30 am 
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My project hasn’t missed a beat at 25 MHz, so I’d say there is some leeway. This is with both the 02 and the 816.


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PostPosted: Mon Nov 13, 2023 3:04 pm 
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According to David Gray at WDC:

Quote:
I know our TSMC .6u parts are actually tested to 20MHz...

The above is from an E-mail message of in September 2020.  That being the case, the timing specs in the most recent data sheet are woefully pessimistic and likely reflect the capabilities of the 1.0µ process that was in use when the 65C02 and 65C816 were converted to static cores in the 1990s.

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PostPosted: Mon Nov 13, 2023 4:49 pm 
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BigDumbDinosaur wrote:
According to David Gray at WDC:

Quote:
I know our TSMC .6u parts are actually tested to 20MHz...

The above is from an E-mail message of in September 2020.  That being the case, the timing specs in the most recent data sheet are woefully pessimistic and likely reflect the capabilities of the 1.0µ process that was in use when the 65C02 and 65C816 were converted to static cores in the 1990s.


Yeah, those 1.0µ '816's are the ones that CMD were fighting to get about half running at 20Mhz in their SuperCPU. I forget who I heard that from ... maybe Jim Brain at Retro Innovations?
Attachment:
SuperCPU.jpg
SuperCPU.jpg [ 66.98 KiB | Viewed 3437 times ]


I couldn't come close to affording one of those back when they came out, but I would have loved to have one.


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PostPosted: Mon Nov 13, 2023 5:10 pm 
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I just assume 0.6u W65C02 will run at 25Mhz, every one of them. I know some will run to mid-30Mhz.
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PostPosted: Mon Nov 13, 2023 6:35 pm 
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plasmo wrote:
I just assume 0.6u W65C02 will run at 25Mhz, every one of them. I know some will run to mid-30Mhz.
Bill


Note for this that 6T in a W65C02S6TPG-14 refers to a "0.6u 1P/2M CMOS Process" at the TSMC Foundry (6TPLG-14 for PLCC and 6TQG-14 for QFP).

The older W65C816 that I was referring to would have a different process number.


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PostPosted: Mon Nov 13, 2023 9:09 pm 
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BruceRMcF wrote:
plasmo wrote:
I just assume 0.6u W65C02 will run at 25Mhz, every one of them. I know some will run to mid-30Mhz.
Bill

Note for this that 6T in a W65C02S6TPG-14 refers to a "0.6u 1P/2M CMOS Process" at the TSMC Foundry (6TPLG-14 for PLCC and 6TQG-14 for QFP).

The older W65C816 that I was referring to would have a different process number.

Before TSMC started making wafers for WDC, Sanyo was the producer.  I have one Sanyo 0.8µ 65C816 here.  It will not run at 16 MHz, but is fine at 14 MHz.

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PostPosted: Mon Nov 13, 2023 9:18 pm 
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There are lies, damn lies, then statistics, and finally data sheets. Most parts will generously exceed their "specifications".

One of my favorite "specifications" has to do with power supplies. Every one will have the noise specified at a 20MHz bandwidth (with added filtering to boot!). It might be belting out several Vpp at 100MHz while quiet as a mouse at 20MHz and below. Why? Because that's the way it's always been done since the best scopes in the world were only capable of 20MHz and no engineer will ever mess with tradition. Even if such a spec is useless for the intended use.

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PostPosted: Tue Nov 14, 2023 12:29 am 
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Spec is validated at temperature, voltage, and process extremes. It also has test load capacitance and resistance that maybe overly conservative. W65C02 also had significant die shrink without changing timing spec, so a W65C02 design with few components to reduce loadings, operates in nominal voltage and temperature can really push the spec. The biggest change was die shrink to 0.6u. I understand they wanted the benefits of smaller die and greater yield, but don’t want to change the test vectors, so it is up to us hobbyists to find the upper limit of W65C02 as well as W65C22 that also had the die shrink process.
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PostPosted: Tue Nov 14, 2023 5:38 am 
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You all got fixated on the 2nd part of my query. My bad, I guess, for citing the 65C02 as an example of performance exceeding specs. What about the first part of what I asked, about logic and other devices for which only min and max prop delays are specified, omitting typical, or memory datasheets that only specify max tAA? A 25nS part might be faster than that because it's one that didn't make the grade as 15nS because its tAA was17-18nS.

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PostPosted: Tue Nov 14, 2023 7:37 am 
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...hence the link I gave, above.

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PostPosted: Tue Nov 14, 2023 10:13 am 
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Quote:
Since the parts cover a range, most of them, in order to maximize yield, will be considerably better than the spec. They're not guaranteed to be though, so you can't count on it. There's also "binning." The "bins" are not actual bulk containers, but classifications for sale. For an EPROM, the "bins" might be for example 55ns, 70ns, 100ns, and 120ns. The parts are tested, and each one is put into the fastest bin that it passes the test for. So imagine a part marked 100ns. It might have been 71ns, which is faster than marked, but not fast enough to make it into the 70ns bin. Or it might have been 99ns. You don't know. They can charge a little more for the faster ones, without throwing out the slower ones.

Agreed. This is how they categorise modern CPU’s like Intel and AMD’s, for example.

Using Pentiums as an example back when the only difference was clock speed, it was exactly that. They all came from the same fab but were classed on what tests they passed. You might get a bunch of Pentium 200’s out of a batch (that passed the 200MHz tests), then the ones that failed at 200 but were stable at 166, 133 MHz etc, were stamped accordingly and sold as Pentium 166’s and so on.

Comes back to the old “silicon lottery”.


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