Microprocessor line offers 4 , 8 , 16 bits
MOS Technology's low-cost n-channel family is compatible with Motorola's 6800 ; provides 68 instructions and 11 addressing modes

by Laurence Altman , Solid State Editor

Being an alternate source to as well
accepted a microprocessor system as
Motorola's 6800 isn't bad for a medium
sized company like MOS Technology
Inc. which until recently had only
a p-channel process suitable
primarily for calculator chip
design. But being able to supply the
microprocessor system in an
advanced n-channel design that offers
the user additional benefits at a
lower cost is even better.

That's what MOS Technology has
done with its first entry into the
microprocessor field. In fact, the
Pennsylvania-based company has
introduced four software-compatible
versions of its microprocessor family
that promise to outperform similar
products already on the market -
and to do it at a lower cost.

The family's first entry is the
MCS6501, an n-channel, silicon-
gate, depletion-load device that
operates from a single 5-volt supply. A
plug-in replacement for the Motorola
6800, it will be offered for delivery
in September for an incredibly
low single-unit price of $20.
...
Peddle, marketing director for
microcomputers, felt it could be
upgraded most directly "using our
smaller-chip capability." The chip,
however, has been reconstructed to
include some key user-oriented
features. Among these improvements
are significant expansion of addressing
capability, including two real index
registers (not available on any
other single-chip device), two
powerful forms of indirect addressing,
an 8080-type READY , fast decimal
arithmetic (including subtract), and
pipelining for higher throughput.

For example , the 6501 lets a user
load, add, and store in three locations
in 9 microseconds. In another
benchmark operation, the 6501 can
move an n-length word from one
memory location to another in only
13 microseconds, compared to about
20 μs for the Motorola and 23 μs for
the Intel devices.

None of these benefits, however,
will complicate the use of the 6501
by the growing number of people
familiar with the 6800 system. The
chip is plug-compatible with the
6800, runs from the same single 5-v
clock, comes in the same 40-pin
package, uses the same 1-MHz
Motorola two-phase clocking, and
can play with any of the Motorola
peripheral or communications-
adapter interface chips. In addition,
MOS Technology will supply some
unique peripheral circuitry, including
RAMs and ROMs.

It should be pointed out, however,
that the 6501, while plug-
compatible with the 6800, is not truly
bit-compatible, but requires some
recompiling of the standard 6800
instructions. Yet the family will be
fully supported by an advanced
cross-assembler - the only "Fortran-
like" emulator available in the
industry - and a full range of easy-to-
apply documentation. Starter sets to
be offered by the company range
from a two-chip $50 set to an
advanced sophisticated microprocessor-
development terminal.

Another version of the design is a
still easier-to-use 8-bit 6502 chip.
This device requires only a single-
phase TTL clock, instead of the
Motorola two-phase clock. Or,
simpler yet, it can be latched for an RC
network to generate its own clock.
The unit price is $25.

For 4-bit systems, a low-cost
small-packaged version is also being
prooffered .
...
are two more chips now in design.
They are a Fairchild-like F-8
equivalent that contains the I/O on
the chip and a design that Peddle
calls a pseudo 16. Upward-software-
compatible with the others, it's
capable of 8-bit transfers and 16-bit
operands.
...

Box: What's on the chip
Future With its advanced n - channel
...
program counter, an instruction
register, instruction decoder and
control circuits, two index
registers, and all input and output
buffers needed to operate with the
Motorola 8-bit bus system. The
chip architecture differs from
that of the 6800 in that it has one
accumulator and two index
registers, while Motorola's has two
accumulators and no index
register.

[slugs not yet slotted in:]
... the Rounding out mos
Technology's design because Chuck
Peddle , marketing director for

Technology's arithmetic - and - logic unit , a pro
gram counter , an instruction reg
ister , instruction decoder and are ...

immediate microprocessor efforts

... the 6502 ran Ragsdale's fig-Forth 25% faster than the 6800 at a given clock speed

... 6502 assembly Pi to 1000 digits. [...] On the Apple I (960 KHz) it takes 2:15. I had to reduce the amount of unrolling and dump all tables to fit in [4K].
[...]
What is most interesting is that I created a 6800 version this weekend, using the Apple-1 version as a guide. And it runs in 2:12 @ 960 KHz. That was unexpected. The dual accumulators really helped optimized the div/mult code.

Yet adding and subtracting in BCD on the 65xx causes no execution penalty.

Performance issues don't come to the forefront until multiplication and division get involved...

but got fed up with the usual decimal to binary errors