Hermeticity. The passivation layer that protects the underlying IC was not that good in those days, combined with cleanliness issues, the trapped particles in the packages would/could cause random errors. This was a particular problem with MOS memories. In ceramic packaging, a vacuum applied when the lid is being installed, and the hermetic seal could be used to eliminate, or at least significantly reduce, this issue. There are interesting threads on several retro-computing sites that I visted recently regarding this issue as it affected early microprocessors like the Intel 4004 and others of that vintage.

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Michael A.

So how then the 6502 solved the issue and managed to be cheaper? Wouldn't other companies want to have cheaper ic as well?

There are some excellent books on the subject (suggestions? I can't remember the titles now, but there is a Commodore 64 book by a guy Tramiel liked). Mainly I think it was a minimal, reliable design, and Tramiel's desire and ability to undercut the competition, take risks and cut corners. And make deals.

As for ceramics, they have better dielectric characteristics, handle moisture better, and have a greater temperature range.

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In theory, there is no difference between theory and practice. In practice, there is. ...Jan van de Snepscheut

From the descriptions provided, the path to higher levels of reliability was a major area of research at that time. We still have concerns about packaging, but errors attributable to impurities within the packages was a major issue with the acceptance of MOS memories. Intel, Motorola, and other semiconductor vendors of that era were all involved in the manufacture of DRAMs. That technology drove semiconductor manufacturing processes. To make money, they had to solve this issue quickly. So in the 70's this was a major area of investment by all the manufacturers. By the time that I graduated in '82, the majority of components could be reliably packaged in plastic packages. Only UV EPROMs and military components were packaged in ceramic packages. The quartz window for EPROMs required the ceramic to hold it, but I remember many application notes written on the subject of errors induced by trapped alpha/beta particles. Some of those come from the packaging methodology, and others come from the package materials themselves. Both of these issues are process and materials issues. Manufucturer's, once the problem sources were identified, worked quickly to refine the processess and change the materials to eliminated this issues.

In certain circumstances, some of these issues still remain with us to this day. The substantially improved cleanliness of both the manfucturing and packaging facilities, coupled with virtually pure silicon ingots, means that we just don't experience problems of this nature with today's parts. But now we have new issues such as packages which are hydroscopic. They have to be sealed in bags with dessicant to prevent them from absorbing water. The absorbed water turns into steam when the part is being soldered and cracks the substrate, etc. The smaller geometries of most logic also means that the probability of a particle induced upset in logic is significantly lower today than 20-30 years ago. However, the same does not apply to memories with reduced geometries. The capacitor-like memory structure of high-density Flash EPROMs is more susceptible, and is one reason that SDRAM and Flash memories are being integrated with error detection and correction circuitry in many situations today in order reduce their error rate to acceptable levels.

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Michael A.

There are now 3 KIM-1's on EBay! Including a blue one.

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In theory, there is no difference between theory and practice. In practice, there is. ...Jan van de Snepscheut

Looking at the Kim-1 i can't find any rom chips. Where is the rom?

It's mask rom in the 6530 chips

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In theory, there is no difference between theory and practice. In practice, there is. ...Jan van de Snepscheut

This particular Kim-1 went for $1602 - just 4 bids from 3 bidders.