This might help. Go here and download the tech doc for the WDC 65C02 (dated Feb 2004):
http://www.westerndesigncenter.com/wdc/ ... 65c02s.pdf
Now, on page 7, Figure 2-1, there is a function block marked "Data Latch", next to the data bus buffer. It shows a link to the internal address bus. Therefore, one could interpret that to mean there is a 16 bit latch (or 2 8bit ones) inside the "Data Latch" that would hold the LSB and MSB during the Fetch operation. Its makes sense that this same circuitry is used for zero page addressing also (with the MSB latch being set to $00).
Hope that helps.
Daryl