Hi I am relatively new and would be grateful if somebody wouldnt mind answering a few questions i have. Sorry if this is not the correct forum.

My question is related to absolute addressing and where the values are stored. Maybe an example will make it clearer

LDA $1234

I assume the processor fetches the LSB then stores it somewhere then fetches the MSB and also stores it before shifting the MSB 8 places then ORing it to get the full address to get data from.

I may be wrong in my assumptions but the underlying question of how does the fetch and store work would still remain.

Thanks

Dan

This might help. Go here and download the tech doc for the WDC 65C02 (dated Feb 2004):

http://www.westerndesigncenter.com/wdc/ ... 65c02s.pdf

Now, on page 7, Figure 2-1, there is a function block marked "Data Latch", next to the data bus buffer. It shows a link to the internal address bus. Therefore, one could interpret that to mean there is a 16 bit latch (or 2 8bit ones) inside the "Data Latch" that would hold the LSB and MSB during the Fetch operation. Its makes sense that this same circuitry is used for zero page addressing also (with the MSB latch being set to $00).

Hope that helps.

Daryl

The processor does not shift and OR anything, because that would be time wasteful. Plus, if you have two 8-bit latches fed from a common source but with independent outputs, you can just use them 'as is.' So yes, the 6502 does store the half-addresses internally, but they're physically separate registers, attached physically to their respective address pins. There's no need to OR anything.