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 Post subject: Assembling for the 6502
PostPosted: Sat Jan 06, 2024 9:11 am 
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I found the following "cheat sheet" I created when I began writing an assembler for the 6502:

Code:
INS T   acc     abs     zpg     imm     abs,X   abs,Y   (aa,X)  (aa),Y  zpg,X   zpg,Y   (aaaa)

ADC I           6D      65      69      7D      79      61      71      75
AND I           2D      25      29      3D      39      21      31      35
ASL G   0A      0E      06              1E                              16
BIT C           2C      24
CMP I           CD      C5      C9      DD      D9      C1      D1      D5
CPX D           EC      E4      E0
CPY D           CC      C4      C0
DEC F           CE      C6              DE                              D6
EOR I           4D      45      49      5D      59      41      51      55
INC F           EE      E6              FE                              F6
JMP B           4C                                                                      6C
JSR A           20
LDA I           AD      A5      A9      BD      B9      A1      B1      B5
LDX K           AE      A6      A2              BE                              B6
LDY L           AC      A4      A0      BC                              B4
LSR G   4A      4E      46              5E                              56
ORA I           0D      05      09      1D      19      01      11      15
ROL G   2A      2E      26              3E                              36
ROR G   6A      6E      66              7E                              76
SBC I           ED      E5      E9      FD      F9      E1      F1      F5
STA H           8D      85              9D      99      81      91      95
STX J           8E      86                                                      96
STY E           8C      84                                              94

Type A - abs
Type B is a superset of type A - abs + indir
Type C is a superset of type A - abs + zpg
Type D is a superset of type C - abs + zpg + imm
Type E is a superset of type C - abs + zpg + zpg,X
Type F is a superset of type E - abs + zpg + zpg,X + abs,X
Type G is a superset of type F - abs + zpg + zpg,X + abs,X + acc

Type H is a superset of type F - abs + zpg + zpg,X + abs,X + abs,Y + (aa,X) + (aa),Y
Type I is a superset of type H - abs + zpg + zpg,X + abs,X + abs,Y + (aa,X) + (aa),Y + imm

Type J is a superset of type C - abs + zpg + zpg,Y

Type K is a superset of type J - abs + zpg + zpg,Y + abs,Y + imm
Type L is a superset of type F - abs + zpg + zpg,X + abs,X + imm


This includes only the NMOS 6502 instructions.

Do the new CMOS additions follow the same general scheme?


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PostPosted: Sat Jan 06, 2024 9:36 am 
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I am not sure I follow your grouping.

I think you should watch Michael Steil's 'ultimate 6502' talk on one of the w3c conferences. He has nice depictions of how the grouping actually works

André

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PostPosted: Sat Jan 06, 2024 9:41 am 
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Please allow me to explain further.

Identifying the instruction mnemonic yields a "base" opcode value for that type of instruction.

Identifying the addressing mode used yields a signed 8-bit adjustment to be added to the base to get the actual machine opcode.


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PostPosted: Sat Jan 06, 2024 10:28 am 
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BillG wrote:
Please allow me to explain further.

Identifying the instruction mnemonic yields a "base" opcode value for that type of instruction.

Identifying the addressing mode used yields a signed 8-bit adjustment to be added to the base to get the actual machine opcode.

I don’t believe the 65C02 strictly adheres to that model, as some of the new instructions, as well as some instructions with new addressing modes, are in odd places in the opcode matrix.  I recall many years ago when I was writing a machine language monitor to support the C02 that I ended up having to use a table methodology to generate opcodes because I couldn’t do the conversion using only arithmetic and Boolean operations.  The Rockwell extensions were particularly troublesome due to the nature of the operand.

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PostPosted: Sat Jan 06, 2024 10:33 am 
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For a different implementation perspective, perhaps see the changes Dave (hoglet) and I made to Arlet's super-clean 6502 to upgrade it to C02.

(Of course, what you might tabulate for your purposes of writing an assembler (or even hand-assembling) needn't have too much to do with how the cpu might be implemented. But they are in some way related. A disassembler similarly.)


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PostPosted: Sat Jan 06, 2024 9:23 pm 
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I have always gravitated toward Neil Parker's excellent description here. (Well, not "always", but you get my drift ... )

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PostPosted: Sat Jan 06, 2024 9:35 pm 
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I've had that bookmarked for ages!


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