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PostPosted: Tue Dec 26, 2023 7:04 pm 
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Can somebody please test the following code fragment on real hardware and report back the result?

Code:
    lda     #0
    sta     $22
    lda     #1
    sta     $122
    ldx     #$F0
    lda     $32,X


Does A contain 0 or 1?

Both 6502 Assembly Language Programming by Lance Leventhal and Programming the 6502 by Rodney Zaks are silent about whether the effective address wraps to stay within the zero page.

On page 102 of Programming the 65816 https://web.archive.org/web/20221112231 ... manual.pdf

Quote:
On the 6502 and 65C02, and in they<sic> 6502 emulation modes of the two sixteen-bit processors, indexing past the end of the direct page wraps to the beginning of the direct page, as Fragment 7.9 shows. The index and the direct page array base are added, but only the low eight bits of the sum specify the direct page offset of the effective address. So in Fragment 7.9, while the base of $32 plus the index of $F0 equals $122, only the $22 is kept, and the accumulator is loaded from dp:$22.


Fragment 7.9 is
Code:
A2F0        LDX     #$F0                                  set up an index of $F0
B532        LDA     $32,X                                 load accumulator from dp:$22


Does the Dormann test suite test for things like this?

Thanks in advance.


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PostPosted: Tue Dec 26, 2023 7:51 pm 
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With the 65C02, a page zero fetch or store will always be from/to a page zero address.  Hence LDX #$FF followed by LDA $01,X will result in a load from $0000.

The 65C816, when operating in native mode, will increment past the end of direct page.  Hence LDX #$FF followed by LDA $01,X will result in the load occurring from $000100, assuming all registers are set to eight bits.

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PostPosted: Tue Dec 26, 2023 8:05 pm 
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Does the NMOS part do so as well?

I need to know for sure before I go modifying my simulation code...


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PostPosted: Tue Dec 26, 2023 8:22 pm 
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On a 65c816 in 65c02 emulation mode it's $00

On a 6507 (so NMOS 6502) it's also $00

(Just what I have to-hand for easy testing)

Gordon

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PostPosted: Tue Dec 26, 2023 8:27 pm 
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Good enough!

Thanks everybody.


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PostPosted: Tue Dec 26, 2023 9:56 pm 
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BillG wrote:
Does the NMOS part do so as well?

I need to know for sure before I go modifying my simulation code...

All eight-bit 65xx MPUs behave in the same fashion, as does the 65C816/65C802 when operating in emulation mode.

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PostPosted: Tue Dec 26, 2023 10:51 pm 
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Microsoft BASIC relies on zero-page indexing to wrap - it's in the floating point divide routine, if I'm remembering right. They loop over the bytes in one of the numbers by initialising the loop counter to a negative value and counting up until it reaches zero.


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PostPosted: Tue Dec 26, 2023 10:55 pm 
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Woz did it early and often in his creations as well.

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