BB8 wrote:
...
the x7 and xF instructions are wider: BBx (xF) instructions are 3 bytes long, while xMB (x7) are 2 bytes long.
You are right! This has changed with newer 65c02s (see
http://www.6502.org/tutorials/65c02opcodes.html):
Code:
x2: x3: x4: x7: xB: xC: xF:
----- ----- ----- ----- ----- ----- -----
0x: 2 2 . 1 1 . . . . 1 1 a 1 1 . . . . 1 1 c
1x: . . . 1 1 . . . . 1 1 a 1 1 . . . . 1 1 c
2x: 2 2 . 1 1 . . . . 1 1 a 1 1 . . . . 1 1 c
3x: . . . 1 1 . . . . 1 1 a 1 1 . . . . 1 1 c
4x: 2 2 . 1 1 . 2 3 g 1 1 a 1 1 . . . . 1 1 c
5x: . . . 1 1 . 2 4 h 1 1 a 1 1 . 3 8 j 1 1 c
6x: 2 2 . 1 1 . . . . 1 1 a 1 1 . . . . 1 1 c
7x: . . . 1 1 . . . . 1 1 a 1 1 . . . . 1 1 c
8x: 2 2 . 1 1 . . . . 1 1 b 1 1 . . . . 1 1 d
9x: . . . 1 1 . . . . 1 1 b 1 1 . . . . 1 1 d
Ax: . . . 1 1 . . . . 1 1 b 1 1 . . . . 1 1 d
Bx: . . . 1 1 . . . . 1 1 b 1 1 . . . . 1 1 d
Cx: 2 2 . 1 1 . . . . 1 1 b 1 1 e . . . 1 1 d
Dx: . . . 1 1 . 2 4 h 1 1 b 1 1 f 3 4 i 1 1 d
Ex: 2 2 . 1 1 . . . . 1 1 b 1 1 . . . . 1 1 d
Fx: . . . 1 1 . 2 4 h 1 1 b 1 1 . 3 4 i 1 1 d
a) 1-cycle NOP on some older 65C02s; RMB instruction on Rockwell and on modern WDC 65C02s
b) 1-cycle NOP on some older 65C02s; SMB instruction on Rockwell and on modern WDC 65C02s
c) 1-cycle NOP on some older 65C02s; BBR instruction on Rockwell and on modern WDC 65C02s
d) 1-cycle NOP on some older 65C02s; BBS instruction on Rockwell and on modern WDC 65C02s
e) $CB is the WAI instruction on WDC 65C02
f) $DB is the STP instruction on WDC 65C02
g) $44 uses zp address mode to read memory
h) $54, $D4, and $F4 use zp,X address mode to read memory
i) $DC and $FC use absolute address mode to read memory
j) $5C reads from somewhere in the 64K range, using no known address mode
I'm not using these instructions yet, so I didn't notice the error. Thanks for the code review!
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