i2c_start: ; i2c addr a constant and RW bit is in C
  lda #0
  asl ; Shift in carry
  ora #I2CADDR
  sta outb ; Save addr + rw bit

  lda #SCL_INV ; Start with SCL as INPUT HIGH. If bit 0 is used we can continue from here with inc/dec.
  and DDRB
  sta DDRB

  lda #SDA ; Insure SDA is output low before SCL is LOW
  ora DDRB
  sta DDRB
  lda #SDA_INV
  and PORTB
  sta PORTB

  lda #SCL_INV
  and PORTB
  sta PORTB
  lda DDRB
  ora #SCL
  sta DDRB ; Set SCL LOW by setting it to OUTPUT
  ;inc DDRB ; We're doing this below
  ; Fall through to send address + RW bit

  ; Send an i2c byte - byte is in outb
  ; From here on we can assume OUTPUTs are LOW and INPUTS are HIGH.
  ; Maybe some of the juggling above is not necessary but let's not assume for now
i2cbyteout:
  lda #SDA_INV ; In case this is a data byte we set SDA LOW
  and PORTB
  sta PORTB
  ldx #8
I2CADDRloop: ; At start of loop SDA and SCL are both OUTPUT LOW
  asl outb ; Put MSB in carry
  ; Different state after start and repeat bytes,
  lda DDRB
  ora #SCL
  sta DDRB ; Set SCL LOW by setting it to OUTPUT
;  inc DDRB
  bcc seti2cbit0 ; If data bit was low
  lda DDRB       ; else set it high
  and #SDA_INV
  sta DDRB
  bcs wasone ; BRA
seti2cbit0:
  lda DDRB
  ora #SDA
  sta DDRB
  wasone:
  ;lda DDRB
  ;and #SCL_INV
  ;sta DDRB ; Set SCL HIGH by setting it to input; Let SCL go HIGH by setting it to input
  dec DDRB
  dex
  bne I2CADDRloop
  ;lda DDRB
  ;ora #SCL
  ;sta DDRB ; Set SCL LOW by setting it to OUTPUT ; Set SCL low after last bit
  inc DDRB
  lda DDRB ; Set SDA to INPUT
  and #SDA_INV
  sta DDRB
  ;lda DDRB
  ;and #SCL_INV
  ;sta DDRB ; Set SCL HIGH by setting it to input
  dec DDRB
  lda PORTB ; Check ACK bit
  clc
  and #SDA
  bne nack
  sec ; Set carry to indicate ACK
  nack:
  ;lda DDRB
  ;ora #SCL
  ;sta DDRB ; Set SCL LOW by setting it to OUTPUT
  inc DDRB
  rts

i2c_stop:
  lda DDRB ; SDA low
  ora #SDA
  sta DDRB
  ;lda DDRB
  ;and #SCL_INV
  ;ta DDRB ; Set SCL HIGH by setting it to input
  dec DDRB
  lda DDRB       ; Set SDA high after SCL == Stop condition.
  and #SDA_INV
  sta DDRB
  rts

 SEND_I2C_BYTE:                  ; Start with byte in A, and clock low.  Ends with I2C_ACK?.
        STA     I2C_TEMP        ; Store the byte in a variable so we can use A with TSB & TRB for data line.
        LDA     #10000000B      ; Init A for mask for TRB & TSB below.  A does not get disturbed below.
        LDX     #8              ; We will do 8 bits.
 sIb2:     TRB  DDRA            ; Release data line.  This is like I2C_DATA_UP but saves 1 instruction.
           ASL  I2C_TEMP        ; Get next bit to send and put it in the C flag.
           BCS  sIb1
              TSB DDRA          ; If the bit was 0, pull data line down by making it an output.
 sIb1:     DEC  DDRA            ; Do a high pulse on the clock line.  Remember there's a 0 in the output
           INC  DDRA            ; register bit, and DEC'ing DDRA makes that bit an input, so it can float up.
           DEX                  ;    IOW, it's backwards from what it seems.
        BNE     sIb2
        JMP     I2C_ACK?        ; (JSR, RTS)
 ;------------------