Finally got some time to clean up the source for our RAM test/diagnostic ROM for the AIM-65:

https://github.com/glitchwrks/aim65_memtest/

Initial work was largely done by TangentDelta. This was written to help diagnose and repair some dead AIM-65s. The test will run on a minimally functional AIM-65 -- all you need is a working CPU, ROM socket, and display board. It performs the following tests:

• ROM checksum
• Stack page quick write presence
• Zero page quick write presence
• RIOT single-pass memory test
• Full system memory test

The ROM checksum and stack page tests are accomplished with macros so that they can run with no RAM, since of course that might be faulty! Once the stack page passes, zero page is tested. With stack and ZP tested, the RIOT and exhaustive system memory tests are performed. These tests are more complete, since we have a minimally functional system by this point. The exhaustive test is based heavily on the routines from the OSI MEMORY TEST from OS-65D 2.0, published in OSI Small Systems Journal, Volume 1, Number 3, September 1977.

Right! Can't rely on a faulty RAM to reliably test itself!

But I'm curious what sort of code is produced by the macros you mentioned. If RAM isn't trustworthy, then all your variables need to held in CPU registers, isn't that right? (And even self-modifying code is off limits.) Sounds like a fun challenge...

-- Jeff

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

That is really cool! I've been thinking about implementing some self-diagnosis on my computer since I saw (here, maybe? can't remember) someone using the Emulation pin to report diagnosis results by blinking in several patterns. I might take inspiration from your project, I particularly like the ROM checksum idea

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BB816 Computer YouTube series

Speaking of testing RAM without needing RAM reminded me of hoglet's project:
> A memory test for the Acorn Atom that doesn't need working RAM to function
https://github.com/hoglet67/AtomRAMTest

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

One thing to look out for in this kind of phased approach is that some memory faults will alias the memory under test back to the zero page pointer(s). It's perhaps conceivable that a test could falsely pass - it would take effort to prove that it couldn't.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Adrian Black had two episodes talking about making a diagnostic ROM for TRS-80s, coincidentally: https://www.youtube.com/watch?v=Hh8dRgtu1Jk and https://www.youtube.com/watch?v=4fuuyLiSgsE&t=955s. Some ideas could be taken from there. Specifically, he mentions the use of March tests to detect some SRAM failure modes such as two locations being linked, which might help solve for the zero page aliasing issue BigEd mentioned.

On my side, I'm working on a 16-bit checksum in 65C816 assembly. I initially looked at using something better like Fletcher that is more thorough than a sum, but the algorithm needs to add two variables, and I need a memory location for that. So I went back to a simple sum. Here is the code, assuming the ROM takes the high 32k of bank zero, and M=X=0. The ROM would have to work in the reset vector region and the checksum region for this code to execute fully, so the type of failure mode it detects is limited (not sure about common modes of failure for ROMs?)

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BB816 Computer YouTube series