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PostPosted: Wed May 25, 2022 9:05 pm 
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I'm reorganizing undisbeliever's flag information into a clobber table that shows how each of the flags of the 65816's P register changes when an instruction runs.

https://wiki.superfamicom.org/flag-clobber-table

Maybe some of you will find it useful.


Last edited by jeffythedragonslayer on Thu Jun 30, 2022 3:00 am, edited 1 time in total.

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 Post subject: Re: Flag Clobber Table
PostPosted: Wed Jun 01, 2022 4:27 pm 
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If you like fixing charts and tables, please review the Instruction Bitfield Chart. The current draft has two known sets of errors and I would be *highly* surprised if there are no further mistakes.

Actually, a combined flags and opcode chart would be quite useful.

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 Post subject: Re: Flag Clobber Table
PostPosted: Wed Jun 01, 2022 6:05 pm 
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Sheep64 wrote:
Actually, a combined flags and opcode chart would be quite useful.


Can you give me more detail on how the rows/columns/cells of such a chart would be laid out and labeled and why that would be useful, and how it would differ from my flag clobber table? I have put the mnemonics as the rows and flags as the columns.


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 Post subject: Re: Flag Clobber Table
PostPosted: Wed Jun 29, 2022 8:05 pm 
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I started another similar document for how the previous state of the flags change what the instructions do. As the flag clobber table turned out to be quite sparse, I opted to put each effect in a separate section and use bullet lists of mmenmics which then list the admodes that apply this time:

(Take this document with a grain of salt, it was created when I was being forced to rush by some bad actors)

https://wiki.superfamicom.org/flag-effect-table


Last edited by jeffythedragonslayer on Thu May 02, 2024 11:07 pm, edited 2 times in total.

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 Post subject: Re: Flag Clobber Table
PostPosted: Wed Jun 29, 2022 9:02 pm 
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This doesn't look right:
"These instructions save the stack pointer to the stack but aren't affected by its value"


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 Post subject: Re: Flag Clobber Table
PostPosted: Wed Jun 29, 2022 9:32 pm 
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jeffythedragonslayer wrote:
I started another similar document for how the previous state of the flags change what the instructions do. As the flag clobber table turned out to be quite sparse, I opted to put each effect in a separate section and use bullet lists of mmenmics which then list the admodes that apply this time:

https://wiki.superfamicom.org/flag-effect-table

At the risk of being offensive, your table is pointless and inaccurate. Perhaps you should thoroughly read the Eyes & Lichty programming manual in greater detail. Meanwhile, I recommend you take that web page down before you succeed in confusing the hell out of newbies.

BigEd wrote:
This doesn't look right:
"These instructions save the stack pointer to the stack but aren't affected by its value"

It doesn’t look right because it is wrong. No operation in the 65C816 saves the stack pointer on the stack.

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 Post subject: Re: Flag Clobber Table
PostPosted: Wed Jun 29, 2022 9:41 pm 
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I think I expressed myself as I intended to, thanks.


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 Post subject: Re: Flag Clobber Table
PostPosted: Wed Jun 29, 2022 9:45 pm 
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Yes, there are quite a few things there that are inaccurate. We like your enthusiasm though. :) Let me second the recommendation for the Eyes & Lichty programming manual. Its size might be scary; but it starts out small, and builds, so you don't have to take the whole thing in one gulp, but rather stop and digest new material before moving on. Then there are large reference sections which I still refer back to frequently now even after 25+ years of having it.

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 Post subject: Re: Flag Clobber Table
PostPosted: Thu Jun 30, 2022 12:19 am 
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I fixed up some stuff, it will continue to get better as I learn the architecture more (yes I have the book :))


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PostPosted: Thu Jun 30, 2022 6:13 am 
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Quote:
These instructions use the stack pointer to know where to go:

RTS
RTL

You’re missing RTI.

Quote:
When the m flag is clear, the following instructions take only one extra cycle:

ADC (all admodes)
LDA (all admodes)
ORA (all admodes)
STA (all admodes)
STZ (all admodes)
BIT (all admodes)
CMP (all admodes)
PLA
STZ (all admodes)

You’re missing PHA and you repeated STZ.

Quote:
When the x flag is clear, the following instructions take one extra cycle:

PLA
PLX
PLY
PHX
PHY
STX (all admodes)
STY (all admodes)
LDX (all admodes)
LDY (all admodes)
CPX (all admodes)
CPY (all admodes)

PLA? C’mon, man!

Quote:
When the x flag is set, these instruction set the high byte of the index registers to 0:

RTI
SEP

The above is completely wrong. All it will do is confuse a newbie.

Quote:
The following instructions take one extra cycle if the low byte of the direct page register is nonzero: [followed by a long list]

A pointless list, in my opinion. Any instruction that accesses direct page will incur a one clock cycle penalty if DP is not pointing to a page boundary.

Again, all of this and much more is covered in the Eyes & Lichty manual.

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PostPosted: Thu Jun 30, 2022 5:26 pm 
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Fixed. I reworded that section on clearing the high byte of the index registers because, according to page 58, that happens when a 16-bit index register is switched to 8-bits. It's not about how the state of a flag when an instruction is beginning to run affects the behavior of that instruction. It's the immediate operand of SEP that affects what SEP sets the flags to.


Last edited by jeffythedragonslayer on Wed May 01, 2024 9:27 pm, edited 1 time in total.

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PostPosted: Sat Jul 09, 2022 4:30 pm 
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I've been thinking about the best arrangement for bitfields plus flags. Unfortunately, the answer has not come to me. It took me several weeks to think of the best arrangement for a bitfield chart. Other matters may take considerably longer. For example, it took me two years to think of a feasible method to structure a hydroponics diagnostic system - and I have yet to implement it. The trick here is to structure a diagnostic tree expert system so that it promotes homoeostasis.

I've been flummoxed on simpler tasks. For example, I struggled with a family tree Motorola derived processors focused on 6502 derivatives. However, if you look at Wikipedia's family trees of programming languages or web browsers, you'll find a common style which also arranges them in a proportionate timeline. That's just showing off.

With the luxury of interactive scripting within a web page, it might be desirable to have some similar to a Digikey or Mouser component picker. Specifically, it would be useful to select the union or intersection of opcodes available on a subset of different 6502 variants and then match by addressing mode, partial bitfield, flag (in)sensitivity (such as decimal or carry in) or flag clobbering while allowing successful matches to be sorted alphabetically, by addressing mode, by cycle count or other criteria. It may also be useful to show partial matches.

For static layout, I considered adding a row within each bitfield cluster to denote affected flags. This may require a more fine-grained arrangement of bitfields. However, a significantly better technique may become obvious within the next two years.

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