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PostPosted: Wed Mar 09, 2022 8:51 am 
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This is the ready check for a serial printer in a driver for the 6800:
Code:
*
* Check printer ready, return with sign flag set if ready
*
PChk
    psha            ; Save A

    ldaa    ACIA    ; Get status register
    rora            ; Get TDRE bit into MSB
    rora
    rora

    pula            ; Recover A
    rts

How would you write this for the NMOS 6502?

I can see juggling bytes on the stack or using a temporary variable, but no direct translation.


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PostPosted: Wed Mar 09, 2022 9:06 am 
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Something like this - it puts the result in the carry flag rather than the negative flag:
Code:
    pha
    lda ACIA
    ror
    ror
    pla
    rts

A CMOS 6502 could do this all in one instruction but you asked for MMOS explicitly.


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PostPosted: Wed Mar 09, 2022 9:19 am 
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The interface was originally used for a parallel printer. Space was extremely limited, so they just read the port and the ready line was bit 7. I would rather not change the interface as that would make the parallel driver even bigger.

The best I could come up with is:
Code:
PChk
    pha             ; Save A

    lda     ACIA    ; Get status register
    ror     A       ; Get TDRE bit into MSB
    ror     A
    ror     A
    sta     Temp

    pla             ; Recover A
    bit     Temp    ; Set S flag accordingly
    rts


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PostPosted: Wed Mar 09, 2022 10:10 am 
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BillG wrote:
The interface was originally used for a parallel printer. Space was extremely limited, so they just read the port and the ready line was bit 7. I would rather not change the interface as that would make the parallel driver even bigger.

The best I could come up with is:
Code:
PChk
    pha             ; Save A

    lda     ACIA    ; Get status register
    ror     A       ; Get TDRE bit into MSB
    ror     A
    ror     A
    sta     Temp

    pla             ; Recover A
    bit     Temp    ; Set S flag accordingly
    rts

If the ready line is bit 7 what's wrong with BIT ACIA followed by BPL or BMI?

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PostPosted: Wed Mar 09, 2022 10:13 am 
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The Ready line is bit 7 for the parallel port. It is bit 1 for the serial port.


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PostPosted: Wed Mar 09, 2022 12:47 pm 
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gfoot wrote:
Something like this - it puts the result in the carry flag rather than the negative flag:
Code:
    pha
    lda ACIA
    ror
    ror
    pla
    rts
George's code looks good to me. Yes, you'd have to make a minor change in every place from which this routine is called (to test Carry rather than the Sign). But that seems tolerable if you're replacing all the 6800 code with 6502 code anyway...

-- Jeff

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PostPosted: Wed Mar 09, 2022 2:38 pm 
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It looks like the 6800 version is nine bytes. If you have space for ten bytes and you have a "junk" zp location, you can just add an ROR zp to George's code:
Code:
    pha
    lda ACIA
    ror
    ror
    pla
    ror temp
    rts

When I was translating code from 6800 to 6502 I would be often annoyed by the need to tsta after a pula, but this is a good counterexample.

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PostPosted: Wed Mar 09, 2022 5:35 pm 
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Is there any reason you can't trash X or Y? If not, here's another 10-byte attempt:

Code:
    tax
    lda ACIA
    ror
    ror
    ror
    php
    txa
    rti


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PostPosted: Wed Mar 09, 2022 7:17 pm 
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The ROR's can be replaced with LSR's if only the carry flag is pertinent.


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PostPosted: Wed Mar 09, 2022 8:45 pm 
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teamtempest wrote:
Code:

    php
    txa
    rti

I don't recommend it, unless you only JSR $EAxx ... PC will be one byte off ...

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Last edited by barrym95838 on Thu Mar 10, 2022 2:07 am, edited 2 times in total.

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PostPosted: Wed Mar 09, 2022 8:46 pm 
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IamRob wrote:
The ROR's can be replaced with LSR's if only the carry flag is pertinent.

... and it works around that pesky ROR bug!

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PostPosted: Thu Mar 10, 2022 2:29 am 
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Dr Jefyll wrote:
Yes, you'd have to make a minor change in every place from which this routine is called (to test Carry rather than the Sign). But that seems tolerable if you're replacing all the 6800 code with 6502 code anyway...


teamtempest wrote:
Is there any reason you can't trash X or Y?


One of the goals of the project is to make it as easy as possible to port 6800 code over. Changing this interface would be yet another thing to forget to check.

The serial driver is under no space pressure.

The parallel driver is. The 6800 version uses 55 of the 56 bytes allotted. I've allocated 64 bytes for the 6502 version and barely managed to code golf it to fit.

I posted that subroutine from the serial driver to see whether I overlooked any coding tricks.


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PostPosted: Thu Mar 10, 2022 2:33 am 
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barrym95838 wrote:
It looks like the 6800 version is nine bytes. If you have space for ten bytes and you have a "junk" zp location, you can just add an ROR zp to George's code:


I do not have a spare zp location, but there are bytes to spare within the driver, that temporary variable I used, for instance.

I should have known that you would come up with something.


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PostPosted: Thu Mar 10, 2022 6:22 pm 
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BillG wrote:
barrym95838 wrote:
I do not have a spare zp location, but there are bytes to spare within the driver, that temporary variable I used, for instance.

You could even ROR a read-only location, like something in ROM. The write will fail but the negative flag should be set correctly.


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PostPosted: Sat Mar 12, 2022 12:18 pm 
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gfoot wrote:
BillG wrote:
barrym95838 wrote:
I do not have a spare zp location, but there are bytes to spare within the driver, that temporary variable I used, for instance.

You could even ROR a read-only location, like something in ROM. The write will fail but the negative flag should be set correctly.

Interesting that you can do it with ROM. That will confuse someone trying to reserve engineer the code unless they happen to know that fact.


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