As I've been reworking my Monitor and BIOS, I've been using some page zero locations as flags for certain operations. These include single bit flags to indicate Xmodem transfer active, S-Record format, an error in memory compare, EEPROM write, commands which require data entry, etc.. In an attempt to save some (EEPROM) space and reduce page zero usage I've started using some of the SMB/RMB and BBS/BBR instructions which are also available in the W65C02 processor. Using these has been quite helpful so far. In general, setting or resetting single bits is a good savings in code size versus loading the Page Zero location, OR-ing / AND-ing and saving it back. The branching instructions typically save one byte versus doing a BIT and Branch instruction. So far I've used the SMB instruction 10 times, the RMB once, BBR 5 times and BBS twice.

Using these rarely used instructions, along with many other coding changes, I've managed to reduce overall code size by more than 350 bytes which allowed me to add a text entry routine and a query command to show the command list. I also reduced page zero usage by 32 bytes and saved an additional 3 bytes in the BIOS. The new instructions only saved a handful of bytes, but every byte saved helps. Granted, these instructions don't exist with the W65C816, so using them limits you to either the Rockwell R65C02 and the W65C02.

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Regards, KM
https://github.com/floobydust

Don't forget TRB and TSB, which do exist in the 65C816 and, in my opinion, are generally more useful. Both perform two operations: a logical AND of the accumulator (.A) with memory that is the same in effect as the BIT instruction, and clearing (TRB) or setting (TSB) memory bits according to the mask in .A. The AND operation occurs before the masking operation, so the instruction also tells you what the status of the affected location was prior to being "touched." TRB and TSB can test and clear/set 16 bits in one operation with the 65C816 if the m bit in SR is cleared.

I use TRB and TSB quite a bit(!) in the device driver sections of POC V1's firmware. For example, there is a one byte bit field that keeps track of the status of the DUART's transmitters (enabled or disabled). TRB will tell me if a transmitter is enabled (bit cleared) and TSB will tell me if a transmitter is disabled (bit set). So I can do something like:

Code:

         lda #%00000010        ;channel B TxD mask
         trb txdstat           ;channel B already enabled?
         beq okhere            ;yes...
;
;   ———————————————————————————————————————————————————————————————
;   Note that TRB implicitly clears the chan B status bit...nothing
;   further is required to maintain the status.  If the bit was set
;   we fall through & enable TxD.
;   ———————————————————————————————————————————————————————————————
;
         lda #txdenab          ;load TxD enable command &...
         sta duart+txdctlb     ;enable channel B TxD
;
okhere   ...program continues...

In the above, I get double duty with the TRB TXDSTAT instruction. Since the logical AND of .A with TXDSTAT occurs before any bits are touched, the MPU will fall through and enable TxD if the corresponding status bit was set.

Unlike BBRx, BBSx, RMB and SMB, which only address zero page, TRB and TSB are able to manipulate single or multiple bits anywhere in the MPU's address space.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

I have never seen the operand notation #%label before, BDD. Have I been missing out on something cool?

Mike B.

Naw. You were merely treated to some of my ham-fisted typing.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!