Hi guys

I've set up my 6502 system which reads from EEPROM and read/writes to RAM ok.
The next stage is to set up the 6522 (in fact 65C22S-14) VIA. Unfortunately my efforts result in no lit LEDs. Is this because I need to somehow latch the outputs of the VIA? Perhaps with CA1 or CA2? If so I thought CA1/2 were for latching inputs.

I've connect it and written a simple program - see below.

Connections (for testing purposes it's been set up the same as the primer demo: http://wilsonminesco.com/6502primer/potpourri.html#BAS_CPU):

RS0 = 6502 system address bus line A0
RS1 = 6502 system address bus line A1
RS2 = 6502 system address bus line A2
RS3 = 6502 system address bus line A3

CS1 = 6502 system address bus line A13
CS2B = select using NAND gate logic per the primer demo
PHI2 = System clock (65C02 PHI2 & Oscillator)
RESB = To the reset button debounce circuit

D0 to D7 = 6502 system data bus D0 to D7

PA0 to PA7 - LEDs & 1K resistors
PB0 to PB7 - not connected (yet)

CA1 - not connected (yet)
CA2 - not connected (yet)

VSS - GND/0V
VDD - +5V rail


My (simple) code:



This should light 8 LEDS attached to PA0 to PA7 of the VIA (via 1K resistors), but it doesn't. Have I gotten this wrong?

I don't particularly see anything wrong with what you've posted, unless "&" means binary in your assembler instead of hex which is usually "$".

Code:

        LDA  #$FF
        STA  VIADDRA

        LDA  #$AA
        STA  VIAPA

is really all you need. Does the oscilloscope show that the VIA is getting selected? I do recommend giving the individual registers names like this (equates) to make it more clear than raw addresses. Since I have 3 VIAs, I have VIA1___, VIA2___, and VIA3___ (fill in the blank with PA, PB, DDRA, DDRB, T1CL, ACR, PCR, etc.). Does the oscilloscope show any activity on the LED lines? I worked with someone nearly 30 years ago who spent the longest time trying to figure out why an intelligent LCD module wasn't showing anything when the code was per the manufacturer's ap. note and all, and it turned out to be that he had it in a loop to initialize it and then display something, and as soon as the displayed text was up, the initialization (which takes quite a few ms) was started again, so the crystals didn't have time to twist in the liquid to make anything visible (since LCDs don't respond as fast as LEDs). When he quit sending it back to the beginning after the display text was sent, voila, it was beautiful to see.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

I can see the CS2B going low, CS1 going high and A13 going high so that seems to be working, PHI2 works in accordance with the system clock. So all a bit puzzling.
Do PB0-7, CA1-2 need to be tied high or low?

I'll send it into a NOP loop after it's set up to ensure it's not the loop causing the issue.
Regarding the variables/equates - I usually do use them, but for this simple test thought to just put in the values.

Many thanks!

I'm going to try another VIA just in case this one is shot, but other than that wait until tomorrow as I've got some more wire being delivered (I've run out so can't show address & data bus while addressing the VIA).

Ok this is really getting odd. I replaced the WDC W65C22S-6TPG14 with a Rockwell R65C22P2 and now all outputs for PA-7 are high.
I then changed the code to set &AA on the pins 10101010, but the pins are all still high....
The clock is being stepped atm so the clock speed shouldn't be an issue, although the clock outputs at 2MHZ which should be fine for both.

Latest code:

when you read back, do you see the pattern you wrote?

The Rockwell VIA port bits, when in input mode, look like a 74LS-equivalent load, meaning that it will appear to be pulling up; so yes, if the load is light, they will appear to be outputting a high state. The WDC VIA port bits, when in input mode, are truly CMOS inputs, and they have bus-holding circuits so it's ok to leave them disconnected when they're not in use (unlike a lot of other CMOS inputs).

CA1, CA2, CB1, and CB2 are irrelevant in this situation. They don't need to be connected or get any other attention to do what you're trying to do.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

I haven't tried doing that (or thought of it), so will try that now.



Thanks for that information, especially the 74LS outputs as it explains what I'm seeing.
Either way, I think that it cannot be the chips, and if I'm programming then correctly then it leads to:
1) I've connected the 6522 up incorrectly. I've checked and double checked it, but all seems well.
2) There's some kind of timing issue. Not sure how to check this.

Slight correction: It's when it's in input mode that it looks like 74LS input. In output mode, I have fround the Rockwell VIA able to drive a huge amount of current compared to 74LS. If it tries to pull down into a short to Vcc, I've gotten 100mA per pin. Trying to pull up into a short to ground, I got 15-20mA per pin. WDC's is symmetrical though, able to do about 50mA into a dead short either direction.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

I've just tested this and if I do an LDA via_ORA I do not get back the pattern. I assume that I don't change them into input given that there isn't anything trying to send data on PA0-7 / PB0-7.

My guess is that if you don't read back correctly, your writes may not have been successful. Not sure how you check that.

It powers up with all PA (port A) bits in the input mode; so if you put a pattern on the input and are able to read it, then the problem is the write, because it's saying you didn't alter the data-direction register. You probably should not tie pins directly to ground and Vcc, since if you do and then succeed in going into output mode, the constant high current on all those pins at once might damage the part with heat. Go through resistors or gates-- anything that will limit the current.

Make sure you didn't miswire the RS pins too. Switching them would mean you're not reading or writing the registers you think you are.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Ok this is driving me slightly nuts.

I've added another a small bit of code to the beginning of the VIA write code which writes $CC to RAM ($1000), loads the value $00 into A (to clean the palette, so to speak) and then load the contents of address $1000 back into A. It comes back with $CC on the data bus. So the write sequence for RAM works fine (both buses and the R/W line).

The CS1 goes high and CS2B goes low when they're supposed to, the clock is reaching the VIA. R/W goes low when it's supposed to.
However, the VIA just isn't storing my data. It comes back with $0 when I read back, not $AA which I sent to it.
I don't think it's the data lines as they show correctly when I test D0-7 on the VIA and it would result in 0's going across the board - just a single bit going awry.

Most perplexing!

P.S. I double checked the RS lines again and they go to correct lines - I buzzed them out as well as visually checking them.

Is this one of those VIA models which needs to see the its inputs (RnW, Chip selects, Register selects) valid on the rising edge of phi2?

Can you run this circuit slower to see if speed is the problem?

Edit: clarify which inputs need to be stable before the phi2 input rises.