Quote:
I'm also thinking on SD-card interfacing (and other SPI devices btw) but not with bit-banging which seems to be too slow for my taste.
Do you have a particular speed goal?
Here's part of the SPI-bitbanging code I have posted on my website:
Code:
CLK_UP: MACRO ; NOTE! Accum is not preserved!
LDA #1
TSB VIA3PB
ENDM
;------------------
CLK_DN: MACRO ; NOTE! Accum is not preserved!
LDA #1
TRB VIA3PB
ENDM
;------------------
CLK_LO_PULSE: MACRO ; NOTE! Clock must already be known to be high!
DEC VIA3PB
INC VIA3PB
ENDM
;------------------
CLK_HI_PULSE: MACRO ; NOTE! Clock must already be known to be low!
INC VIA3PB
DEC VIA3PB
ENDM
;------------------
MOSI_UP: MACRO ; NOTE! Accum is not preserved!
LDA #2
TSB VIA3PB
ENDM
;------------------
MOSI_DN: MACRO ; NOTE! Accum is not preserved!
LDA #2
TRB VIA3PB
ENDM
;------------------
; For SEND_BYT and RCV_BYT below, I use program structures discussed in my web page
; http://wilsonminesco.com/StructureMacros/index.html . The source code for implementing them on the C32 assembler is at
; http://wilsonminesco.com/StructureMacros/STRUCMAC.ASM , but you can undoubtedly see what they will assemble if you want to do it
; without the macros. I used them here to make it more clear what is happening.
SEND_BYT: ; Start with byte in A. Slave must already be selected.
PHA ; Put the input number on the stack because we need A for the TRB/TSB mask below.
CLK_DN ; Prepare for mode-0 transmit, and for high clock pulse with INC DEC.
TSX ; Put the stack pointer in X for shifting below without bringing it back into the accum.
LDA #2 ; 2 is the value of the MOSI bit for TSB & TRB.
FOR_Y 8, DOWN_TO, 0 ; 8 is the number of bits we will shift out and test in the loop.
ASL 101,X ; Shift the input number left, since transmission is msb-first.
IF_C_CLR ; The bit gets put in the carry flag.
TRB VIA3PB ; If the bit was a 0, clear the MOSI bit in VIA3PB,
ELSE_ ; otherwise
TSB VIA3PB ; (ie, the bit was a 1), set the MOSI bit in VIA3PB.
END_IF
CLK_HI_PULSE ; Pulse the clock line. The INC/DEC does not affect A.
NEXT_Y ; Decr the counter and see if we need to repeat the loop.
PLA ; Remove the number from the stack. (We don't need it anymore, but we need the stack cleaned up.)
RTS
;------------------
RCV_BYT: ; Slave must already be selected, and first bit must already be waiting on MISO. Output is in A.
CLK_DN ; Prepare for mode-0 receive, and for high clk pulse with INC DEC.
LDA #0 ; We will build up the byte in A, so init it to 0.
FOR_Y 8, DOWN_TO, 0 ; 8 is the number of bits we will shift in in the loop.
BIT VIA3PB ; MISO is on VIA3PB6, which BIT reflects in the V flag.
CLC
IF_V_SET
SEC ; Transfer V flag into C flag,
END_IF
ROL A ; then rotate it into the accum.
CLK_HI_PULSE ; Pulse the clock to get the next bit ready, even if it won't get read
NEXT_Y ; until the next RCV_BYT . Decr the counter and see if we need to repeat.
RTS ; Output is in accum.
;------------------
< now build the routines specific to the SPI ICs you want to use >
Note that it only takes two instructions for a complete clock pulse, and that in the sending, the MOSI is set or cleared using only one instruction, not having to read, AND/OR, and then store back. It's still bit-banging of course, but probably quicker than many might think. For further speed-up, you could straight-line it to eliminate the DEY, BNE (which are what the "NEXT_Y" macro assembles) so it's no longer a loop.
I know SPI allows sending and receiving at the same time, but none of the SPI ICs I've used so far do that. They only do one at a time.
Quote:
Option2: Let's use a dedicated SPI interface IC. Unfortunately there is not so many ... Unlike UARTs, they're quite rate [rare?]. To be precise I only know about 65SPI, but it would be harder/more expensive to get one from Hungary, also maybe it's too 65xx specific, I'd like something I can use in my Z80 projects as well. I don't know if 65SPI can be used with outer [other?] CPUs easily or not.
Contact Daryl here on the forum and get one or more 65SPI's directly from him. I know he won't charge you abusive amounts for shipping like some companies do, and he can probably send it out within a day of when you ask. I'm sure you'll find him to be very easy to do business with.
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However I would use my solution with existing computers for 65xx like Commodore 64 (about 1MHz) and for Z80 like Enterprise-128 (4MHz, but Z80 is slower on the same clock rate in average). I built something like "common I/O interface" which is a light bus using only 4 bit for address bus and 8 bit for data with some control signals. This is implemented for Z80 and 65xx too, so the connected devices only need to deal with a common factor in the sense of interfacing with various CPUs. But the average speed of these systems are far below of something like 45MHz, so it's quite slow to get some decent speed for SD card via SPI ...
