So, I managed to get the simulator proof test running on my simulator, and I've found several issues.

I'm down to decimal mode.

I have this sequence. This is the 'chkdad' routine for those following along at home. This shows the address, instruction, status, registers, and the top part of the stack ($1FF down to, I dunno, $1F5 or so...)


Also, here's the content of the $0050-005F, which does not change in this process:


So it's LDA $57, which is 01, and then it ADC $58, which is 99, with Carry set, in Decimal mode. I have this coming out at $01 (99 + 1 + 1 = 101, mod 100 = 1), with carry set. But the test is comparing it with $59, which is a zero. Am I missing something here? Why would ADC be set to 0?

There is two calls of the decimal add & subtract routine "chkdad". One is with carry clear, the other with carry set. You can distinguish them by looking at $56 which is "adfc", 1 for carry set, 0 for carry clear. According to this "chkdad" was called with a CLC ahead of it but carry in the processor status is on.

You need to find the place where the carry is illegaly set or not cleared.

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6502 sources on GitHub: https://github.com/Klaus2m5

Ah, thank you so much. I've been managing to bumble through the rest of this with only a basic understanding of how the test works, rewrote my math routines from scratch, but this one was flummoxing me. I will look at it later when I return from a trip.

Yay!

It works!

None of my CLx routines were working, it turned out. So, CLC was failing.

Then I had a final problem with ADC in Decimal, where 99 + 1 was turning in to "A0"...doh! One off error for carry.

But now it passes (I get to the JMP $3CD0 spot...).

Now I need to add interrupts and reset and those bits to it. Clean up the UI.

Thanks for the help, and thanks so much for the test suite.

CLC and all other CLx opcodes are checked earlier in the test. Was this going undetected?

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6502 sources on GitHub: https://github.com/Klaus2m5

Well, I looked through it and I think that the CLC/SEC check was working in that case, but it was clearly failing in the other case. Now, CLC is a pretty simple routine.

What I had before, in Java, was:

And in context of the ADC tests, this was apparently not sufficient. So I changed it to:

That was enough to make it work.

I tried to change it back to what it was, and all the tests pass, so something else I may have done added to the repair.

But when I was initially testing, I stepped over CLC, and saw the C flag bright as day, so at the time, that was the correct solution.

Strange, because the second version shouldn't make a difference except the extra closing parenthesis, which is probably just a typo in the example but not present in your code.

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6502 sources on GitHub: https://github.com/Klaus2m5