So I'm finally getting back to the finer things in life after all this horrible relaxing in the garden and the pain of a vacation in southern France ... ahem ...

Liara Forth for the 65816 is going to have the TOS in A (C, rather). Which creates a problem for Forth words such as ALLOT where the TOS needs to be tested for zero or negativity: Since this is subroutine threaded code, I have no idea if the N and Z flags reflect what is in A, or are left over from some other operation. So I need to retest A.

The most obvious code is simply CMP.# 0000 (that's CMP #$0000 for everybody who's not me). That's three bytes and three cycles in 16-bit mode; because Liara puts the priority on speed over size, this is my solution for now. A TAY TYA combo is one byte less, but four cycles.

This all seems terribly expensive for such a simple task. Am I missing something obvious that would give me two cycles?

In some cases ASL A or LSR A could be used - however, if you want to test everything and not destroy A, I bet nothing beats CMP #$00 (or either of : and #$ff ora #$00 eor #$00)

Hmmm... how about BIT #$0? (Not sure if that would work on the 65(c)02, but the context seems to be the 65816).

You mentioned STC. Since there is no "NEXT" to potentially foul the flags, you should be able to assume that the condition codes are preserved between consecutive words, right?

For cycle squeezers, I can't think of anything faster than CMP#, AND#, ORA#, and EOR#.

Mike B.

Why TAY TYA? TAY only would be sufficient. The flags are already set by the TAY and A does not need to be restored nor need the flags to be set a second time.

_________________
6502 sources on GitHub: https://github.com/Klaus2m5

Good call -- somehow that's so obvious I missed it! Unfortunately 65xx CPU's don't have a lot of registers, and in Scot's case -- with TOS in A -- I think it's safe to assume Y also has something important in it.

INC A DEC A (or similar) leaves Y alone but it's still 4 cycles. You're stuck with two instructions because you need DEC A to undo the change made by INC A.

Re needing to undo the change you made to A, the only exception I can see is if you used XBA (exchange the high and low bytes) as the means to update the flags. If the result is zero -- and assuming you intended to test for zero anyway -- then the flag update only costs 2 cycles (with no need for another XBA to undo the "change" you made). But it's hardly a general-purpose solution. For that, CMP# (or similar) is the way to go, as others have already noted.

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

I typically use ORA #0 in a situation like this if I don't have the option of touching another register. TAX or TAY would be good *if* the index registers are the same width as the accumulator. Otherwise, the result won't be valid if the B-accumulator contains anything other than $00.

Incidentally, XBA takes three clock cycles, as does ORA #0 when the accumulator is set to 16 bits.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

OMG, you are perfectly correct, how could I not see that? Y is actually free to be changed by the Forth word routines (X is the Data Stack pointer), so no problems there; and the assumption is that all registers are 16 bit by default (which I should have stated, sorry). Good grief.

Thanks, everybody. And we have now established that vacations are bad for my brain.