decided to stick the port testing till later on, wanted to go for testing out the IRQ and timers. The basic idea is to sret up T1 and T2 to time and create IRQs. If T1 does it sucessfully, it would then be cleared, and T2 then tested. By getting the two IRQs, that shows that the timers and the IRq line are functional.

At least now I have the timer count down and the IRQ comes down like it should. HOWEVER, in the IRQ handler, I have it so its supposed to clear out the IRQ, and yet it merely lreaves it low, basically keeping the program off somewhere in la la land...

Help!

code thingie here, flames most welcome....


ViaIrqTest
LDA #$01
STA IrqMode ; Timer test #1
STA IrqSource ; its from the 6522, dude.
LDA #$00
STA Via_ACR ; Set the mode T1 timed interrupt, PB7 disabled.
LDA #$C0
STA Via_IER ; Enable Timer 1 interrupt only.
LDA #$FF
STA Via_T1C_L
LDA #$01
STA Via_T1C_H ; hopefully, $01FF will be less than 1 second.
CLI ; Let the games begin!
JMP IrqDanceOfDeath

T1IrqGood
SEI
LDA #$00
STA Via_IER ; Ok, clear out the register for now.
LDA #$02
STA IrqMode ; Ok, this says: test out timer 2!
LDA #$A0
STA Via_IER
LDA #$FF
STA Via_T2C_L
LDA #$01
STA Via_T2C_L
CLI
JMP IrqDanceOfDeath

T2IrqGood
SEI ; Ok, both timers passed the mustard...
LDA #$00
STA Via_IER
STA Via_IFR
STA IrqMode
STA IrqSource
JSR FlashLedOnce ; flash #5, 6522 Irq OK
JMP ViaBitWalkTest



And now, inside the IRQ handler:


Timer1Interrupt ; The individual interrupt processings, nothing here for now until later on...
LDA IrqMode
CMP #$01 ; Was it the self test check?
BEQ ViaTimer1TestGood
RTS

ViaTimer1TestGood
PLA ; dummy pop off the stack
PLA
LDA #$00 ; Clear that interrupt!
STA Via_IFR
STA Via_IER
STA Via_T1C_L
STA Via_T1C_H
JMP T1IrqGood

Timer2Interrupt
LDA IrqMode
CMP #$02 ; Was it the self test check?
BEQ ViaTimer2TestGood
RTS

ViaTimer2TestGood
PLA ; dummy pop off the stack
PLA
LDA #$00
STA Via_IFR
STA Via_IER
STA Via_T2C_L
STA Via_T2C_H
JMP T2IrqGood


The idea being the T1 is first set up. I use the IrqMode location to tell me that I am testing out T1 in this instance. The IRQDanceOfDeath is merely a 1 second delay loop that ends up freezing the program. The idea bieng that the IRQ will jump it out of the loop there and move onto the next side of testing.

For the 6522, I lload 0 into the various regs and also the timers as the spec sheets tell me that you need to clear out the IRQ by accessing the counters once again. I also set down the interrupt enables so that it wont start out one immediately over again...


ouch and help!

_________________
"My biggest dream in life? Building black plywood Habitrails"

You can't normally use RTS to exit an ISR. Use RTI. The IRQ puts not only the return address on the stack but does it differently from how JSR does, and pushes an extra byte, the processor status register P.

Storing 0 to the IER does nothing. Bit 7 tells if you want to enable or disable interrupts, and bits 0 through 6 tell which one. A 0 in bit 7 means "disable", but then the rest of the 0's mean "don't do it to any of the interrupt possibilities." Instead, do LDA #$40, STA IER.

To clear the T1 interrupt: The data book says, "The T1 interrupt flag is reset by either writing T1C-H (starting a new count) or by reading T1C-L." It also says, "In addition, individual flag bits may be cleared by writing a '1' into the appropriate bit of the IFR." Notice it does not say "writing a 0"; so storing 0 to the IFR again does nothing. The best way to disable the interrupt in your case would be BIT T1CL. That way you don't even modify the accumulator.

Even at only 1MHz, T1 will only go about .065 seconds max before rolling over. On my workbench computer running at 5MHz, I use T1 in free-run mode for generating an interrupt every 1/100th of a second to keep time for the clock and callendar. At 5MHz, that's almost the maximum T1 time. Your $1FF will be about half a millisecond at 1MHz.

In your 26th and 27th lines of code, you have LDA #$01, STA Via_T2C_L . I think you meant STA Via_T2C_H (not T2C_L).

There is a value in using the same I/O ICs over and over instead of jumping around. Even if you don't have the most powerful one around, more experience with it gives you a better handle on its nuances and possibilities. This is especially important with those few important things that don't show up in the data sheets. Study the data sheets carefully since they'll give you most of what you need to know to make things work right the first time, and ask here and then make your notes on the data sheets for those few other things.

For code efficiency: remember that with the 65c02, instead of LDA#00, STA ACR, you can do STZ ACR, saving an instruction and sometimes preserving something valuable in a processor register. Also, there's no need to do an SEI inside the ISR, since the interrupt sequence already sets the interrupt-disable bit. To further shorten things, you could choose values for IrqMode that you can test without using CMP. For example, if you use FF, 00, and 01, you can test by the N and Z flags, and change the value by 1 with INC or DEC. Then you have the BEQ ViaTimer2TestGood, followed by RTS (which should be RTI?) but you could save a line by using BNE to the RTS further up and not using another RTS after this conditional branch instruction. If you have the 65c02, your JMP instructions here that are jumping less than 128 bytes can be replaced with BRA (Branch Relative Always), which is a byte shorter. If you have an old NMOS 6502, you can still take advantage of the fact that you'll know the state of at least one of the flags you can branch on when you get to that point, and replace the JMP with a BNE or other branch instruction. (This is not as clear as BRA though.) As you gain practice with the available instructions and with factoring, you can cut the length of your code in half while making it faster too. The shorter code is nearly always easier to make work the first time and easier to troubleshoot (because it's clearer) if it does not work the first time.

Garth
WB6NUY

Oncew again, thanks a mil. When you get a free afternoon sometime, am taking you to lunch, give me the word when. Will have to bring the cpu with me, show ya what it does and things I work about a mile from Disneyland, and I think your job is in Cypress if I remember correctly, so that isnt too far.

The RTS is mistaken but is NOt the RTI, as I use a routine at the very end to restore the 6502 registers, THEN it does the RTI. So it should have been JMP Restore6502Registers instead of the RTS. (thats what I get for typing in programs while asleep!)

The IER was from me being confused with the spec sheet.

I am running a 6502B at 4 MHz on this unit. I might switch to 65C02 but only if the price warrants it. At work, I figure several thousand 6502s but onlly 40 or so 65C02s floating around. (only Data East and the old poker game I did ages ago used the 65C02; Atari used the regular 6502 and kept using it for their sound systems)

The program length I am not super concerned at this time, for my board, I gave it the full 32K of program space. As I gain more experience from being rusty for some years, I can hack things down.

Email me sometime, I will send you the entire program. Anyone else who is interested I will email as well, my email is Nightmaretony@yahoo.com.

and Garth, thanks once again, this thing is shaping up superbly now. I also got in contact with the original programmer oif the home Fireball pinball game, which I am trying to make my board work for; she is looking for the original code and will send me a copy if she finds it.

After this self test, my next thing is to crack out the source code to the Gottlieb pinball game. The BIOS is 8K with a 2K game eprom. I will post results here, same with the source for anyone who is interested. I am going specifically for the pinball machine HAUNTED HOSE because...its a good one to work with, and I have one in my living room

_________________
"My biggest dream in life? Building black plywood Habitrails"