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something like the '816's TRB and TSB instructions. Am I way off-track?
You are on-track. One of the reasons address reservations are my favorite are they don't have to respect a bus cycle lock. In my simple system the bus isn't locked for RMW operations. Another master may take over in the middle of a RMW operation. It only matters if the same address is being written by both masters.
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How would you prevent contention between two processes for the same semaphore?
I am not quite sure I understand the question. But, I think contention may be prevented by clearing the semaphore reservations during an interrupt routine. Only one process can run at one time (on a single processor). Two different processes can try and acquire the same semaphore only if a process is interrupted during the acquisition. The semaphore acquisition will fail if a second process tries to obtain it because the reservation has been cleared.
A dedicated signal may be required to clear all the hidden reservation bits, otherwise too much time would be spent clearing reservations during an interrupt.