6502.org Forum  Projects  Code  Documents  Tools  Forum
It is currently Wed May 08, 2024 12:40 pm

All times are UTC




Post new topic Reply to topic  [ 1 post ] 
Author Message
PostPosted: Thu Oct 10, 2002 4:39 am 
Offline

Joined: Thu Oct 10, 2002 3:38 am
Posts: 6
Location: San Jose, CA
I see there are other folks here interested in writing
a cycle-accurate simulator for 6502. Me too.

First, does anyone know of a "stand alone" (not infested
with Windoze calls or graphics) 6502 simulator
written in "C" that would be a good candidate for
stripping off a user interface and using as just the
"engine" to run the program?

What I ultimately want to do is develop a text-based, POSIX-based
(runs on Linux, BSD, Solaris, SunOS, etc.) simulator and debugging
shell that can simulate at least 6502, 68000, and
MIPS. No graphics, all text.
I chose these as examples of respectively,
one of the simplest possible designs that can be
understood almost completely, a representative of
of a particularly well-implemented CISC design,
and a representative of a very elegant RISC design, with
lots of complications visible to the user as a consequence.

The idea is to teach starting with 6502, and work up
in a way that exposes the different approaches to
making a CPU to help build a degree of perspective
and insight about different ways to do things and why
they're done that way, rather than just "here's the CPU
we're going to study. It's this way just because."

I'm struggling with the framework that could accomodate
these three utterly different architectures with a uniform
user interface module that is as independent as possible
from the "execution engine" code. The "execution engine"
code could totally different inside, but I'd want to somehow
"export' the parts a simulator would make visible (registers, perhaps pipeline stages, certainly the stack such that it is), with a uniform command set (s = step into, o = step over,
b = set breakpoint, etc.)

Ideally, you could rapidly simulate the same program
for each of the three CPUs
Does anyone know of a commercial or academic tool
that already simulates CPUs by cycle that isn't basically
VHDL or focused on gate level?

I'd do 6502 first, since it is the most do-able.
But all the better if there's already a tool to do this. :)

It seems obvious that other 8-bit micros would be
fun to port here too. The uniform interface would
make it easy to learn one way to do things, and then
simulate anything that there's an execution engine
module for.

Thanks for any pointers!
-- Ross

_________________
The economy isn't "Grapes of Wrath", but it is getting
to be "Raisins of Regret."

-- Ross


Top
 Profile  
Reply with quote  
Display posts from previous:  Sort by  
Post new topic Reply to topic  [ 1 post ] 

All times are UTC


Who is online

Users browsing this forum: No registered users and 8 guests


You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot post attachments in this forum

Search for:
Jump to: