I haven't read through all the details in the preceding 4 pages of posts, but yes, in the early 2000s.
I had to do it within a packetized protocol, and 2 stop bits to get the timing to work with inter-byte processing. For the incoming case, the PC would signal the C64 (in my case), wait for the C64 to ACK, then stream up to a 256 byte packet. The first signal would NMI the 6502, which then put it in a tight timing loop for receiving the packet bytes. This way, the 6502 could be doing other things, be interrupted by the incoming burst RS232 activity, and resume. Initiating from the 6502 directly doesn't need that NMI since it can immediately go into its tight loop.
This packetization is basically "cheating" stability-wise vs just a plain RS232 stream, but certainly was appropriate for transfer use, versus something like interactive BBS typing/display.
I distributed the sub-cycle timing error between the 8 bits, and sought to sample received bits in the middle of the pulse based on offsetting from where I noticed the start bit. I think these have been done in the thread already.
I used it primarily for receiving (eg PC->C64 transfers) instead of bulk sending, and transferred lots of files and disk images. Of course, sending was implemented in order to handle the ACK/NAKs and such. There were basically no errors to speak of, and the protocol did packet checksums & automatic retries anyway, yelling loudly if it encountered any. Also, my wiring was really jank going through multiple decades-old adapters to a USB/RS232 interface on the PC, and still didn't have any problem.
Code:
.if PAL > 0
;PAL timing: 985250 / 57600 = 17.105
; 0 17 34 51 68 86 103 120 137 154 171 188
; s17 b17 b17 b17 b18 b17 b17 b17 b17 s17 s17
recvCycleFlags = %00001000
.elseif NTSC > 0
;NTSC timing: 1022727 / 57600 = 17.755677083
; 0 18 36 53 71 89 107 124 142 160 178 195
; s18 b18 b17 b18 b18 b18 b17 b18 b18 s18 s17
recvCycleFlags = %11011101
.else
.error "Neither NTSC nor PAL defined"
.endif
.macro receiveByte_macro
lda #recvCycleFlags ; timing error bitmask from above
ldx #$06
lsr $dd01 ;6 cycles
ror ;2 ; data bit into top of .A, timing bit out of bottom of .A
bcs *+2 ;2+1 ; timing fixup
nop ;2
dex ;2
bpl *-8 ;3
lsr $dd01
ror
.endmacro
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